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rk3288 and rk3399 use same edp IP, move soc specific setting to
soc/display, and move edp driver to common, so rk3399 can reuse
this driver.
BUG=chrome-os-partner:52460
BRANCH=none
TEST= test on jerry and mighty, edp panel can work
Change-Id: Ie3f3e8468b2323994af8a002413bf93b3edc8026
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 64bb4b2c7ed373d9730c9aa0b0896a32164fc7ee
Original-Change-Id: Ie5c15a81849a02d1c0457e36ed00fbe2d47961fb
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/340504
Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14725
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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The gpio of rockchip SoCs(rk3288 & rk3399) are the same IP,
moving the gpio code of rk3288 to common then can be reused on rk3399.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=build and boot into chromeos on veyron_jerry
Change-Id: I10a4b9d32afe60fd52512f2ad0007e9d2785033b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1c0c4b4b999790b0be7b0eeb70d2a7a86158f779
Original-Change-Id: If13b7760108831d81e8e8c950cdf61724d497b17
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/339846
Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/14712
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Upcoming designs are based on similar SOCs, this patch moves code
which can be reused into a common directory under soc/rockchip.
Changing spi.h to include stdder.h, as this is were check_member() is
defined, this becomes necessary later when the new SOC code is added.
Renaming UART driver private functions not to be bound to any
particular SOC.
BUG=none
BRANCH=none
TEST=the refactored code works fine on the new platform (with the rest
of the patches applied).
Change-Id: I39a505aecda8849daa58a8eca0e44a5243664423
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f63f2582042ac115481207ddf329ea2e3260e55e
Original-Change-Id: I3a1139305354d460492b25a45f3da315a9a0b49e
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/335408
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14235
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
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