coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2016-07-12	rockchip/rk3399: Fix pinctrl pull bias settings	Shunqian Zheng
	The pull bias settings for GPIO0_A, GPIO0_B, GPIO2_C and GPIO2_D are different from the other GPIO banks. This patch adds a callback function to get the GPIO pull value of each SoC(rk3288 and rk3399) so we can still use the common GPIO driver. BRANCH=none BUG=chrome-os-partner:53251 TEST=Jerry and Gru still boot Change-Id: I2a00b7ffd2699190582f5f50a1e21b61c500bf4f Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 46d5fa7297693216a2da9bcf15ccce4af796e80e Original-Change-Id: If53f47181bdc235a1ccfefeeb2a77e0eb0e3b1ca Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/358110 Original-Commit-Ready: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15587 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-05-09	rockchip: refactor gpio driver	Shunqian Zheng
	The gpio of rockchip SoCs(rk3288 & rk3399) are the same IP, moving the gpio code of rk3288 to common then can be reused on rk3399. BRANCH=none BUG=chrome-os-partner:51537 TEST=build and boot into chromeos on veyron_jerry Change-Id: I10a4b9d32afe60fd52512f2ad0007e9d2785033b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1c0c4b4b999790b0be7b0eeb70d2a7a86158f779 Original-Change-Id: If13b7760108831d81e8e8c950cdf61724d497b17 Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/339846 Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/14712 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>