| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-04-05 | soc/qualcomm/sdm845: Add MMU support | T Michael Turney | |
| Initialize 1st 4GB as Device Memory, except: * 1st page: NULL address * System_IMEM: Cached SRAM * Boot_IMEM: Cached SRAM TEST=build Change-Id: Ic6cf022b08bb2568fdf956cea8bad46da89236c5 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25201 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> | |||
| 2018-03-26 | soc/qualcomm/sdm845: Support for new SoC | T Michael Turney | |
| TEST=build Change-Id: Ie54e310a94f61b8d86c13261937015e3f5a2ab01 Signed-off-by: T Michael Turney <mturney@codeaurora.org> Reviewed-on: https://review.coreboot.org/25199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> | |||
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |