coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2019-07-15	src: Use '#include <timestamp.h>' when needed	Elyes HAOUAS
	Change-Id: Ic0483982e8115ae99367d08d8ed77b8a316f5405 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2019-03-18	qcs405: Add DRAM resources	Nitheesh Sekar
	TEST=build Change-Id: Iea79a942c297400c88aa205da713bcfcb8c51185 Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29954 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-03-18	soc/qualcomm/qcs405: Support for new SoC	Nitheesh Sekar
	Adding the basic infrastruture soc support for qcs405 and a new build variant. TEST=build Change-Id: Ia379cf375e4459ed55cc36cb8a0a92cab18b705e Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29948 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>