coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2024-05-30	tree: Remove duplicated <soc/gpio.h>	Elyes Haouas
	<gpio.h> is supposed to chain-include <soc/gpio.h>. Change-Id: Ib25581bd2c8dd38cdd0396561ce5f9a782365f14 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82691 Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-24	Revert "soc/qualcomm: Increase SPI frequency to 75 MHz"	Shelley Chen
	This reverts commit 363202b43589ec240c4a0c8f5b449fbd5c1333f8. Reason for revert: Seeing some bit flips on the SPI bus, but cannot repro reliably on local builds. Going to downgrade back to 50 MHz to see if builder builds are more stable on each variant as a result. Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: I4fe76bac915e3b3c794821cd160a66824e38ea83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73214 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-23	src/soc/qualcomm: Remove unnecessary space after casts	Elyes Haouas
	Change-Id: Ic6c711fe3fad19c24ca4c01f8d0a4bc002f14bd6 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69807 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-31	soc/qualcomm: Increase SPI frequency to 75 MHz	Shelley Chen
	Increase frequency of sc7280 to 75 MHz. Setting the delay to 1/8 of a cycle as a result of experimentation. BUG=b:190231148 BRANCH=None TEST=Make sure that herobrine board boots HW Engineer measured SPI frequency and verified running at 75 MHz Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: I3cf5a7c85f12800a11ece397a354349f2a0a235f Reviewed-on: https://review.coreboot.org/c/coreboot/+/64673 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-01	soc/qualcomm/common: Increase SPI gpios drive strength to 8mA	Shelley Chen
	EE requested that we increase the drive strength for the SPI lines to 8mA. BUG=b:198627043 BRANCH=None TEST=EE help verify Change-Id: Ic887a7eef74f1063f7284db042c5fbd2e1d5bd4c Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-09-03	soc/qualcomm/common/qspi: Add support for common QSPI driver	Ravi Kumar Bokka
	copy existing QSPI driver from /soc/qualcomm/sc7180 to common folder. This common QSPI driver works in master mode and provides read/write operation for the slave devices like flash. BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Change-Id: I5b3816b823e14db1dd13f1eb4a6761c7a61604b9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55323 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shelley Chen <shchen@google.com>