summaryrefslogtreecommitdiff
path: root/src/soc/nvidia
AgeCommit message (Expand)Author
2015-03-26tegra132: fix carveout address calculation >= 4GiBAaron Durbin
2015-03-26t132: Implement clock initialization api for functional unitsFurquan Shaikh
2015-03-26tegra132: move common bootblock init into SoC codeAaron Durbin
2015-03-25tegra132: enable pinmux input for PAD_CFG_GPIO_INPUT()Aaron Durbin
2015-03-25tegra132: select HAVE_MONOTONIC_TIMERAaron Durbin
2015-03-25tegra132: use pre-existing reset APIAaron Durbin
2015-03-25tegra: correct gpio_index_to_port() calculationAaron Durbin
2015-03-25tegra132: fix gpio constantsAaron Durbin
2015-03-25tegra132: output chip information and MTS versionAaron Durbin
2015-03-25tegra132: introduce romstage_mainboard_init()Aaron Durbin
2015-03-25ryu: Add mainboard_init_xxx functions to get it building againTom Warren
2015-03-24tegra132: add bootblock_mainboard_early_init()Aaron Durbin
2015-03-24tegra132: use padconfig for initializing uart padsAaron Durbin
2015-03-24tegra132: provide pad configuration interfaceAaron Durbin
2015-03-24vboot2: separate verstage from bootblockDaisuke Nojiri
2015-03-24nyans: reduce code duplication in bootblock and romstagesDaisuke Nojiri
2015-03-23vboot2: read secdata and nvdataDaisuke Nojiri
2015-03-23Generalize revision number calculation functionVadim Bendebury
2015-03-23t132: Change romstage base addressFurquan Shaikh
2015-03-23t132: Add support for tpm i2cFurquan Shaikh
2015-03-21tegra132: convert to stopwatch APIAaron Durbin
2015-03-21tegra132: fill out udelay() implementationAaron Durbin
2015-03-21tegra124: switch to stopwatch APIAaron Durbin
2015-03-20bootblocks: use run_romstage()Aaron Durbin
2015-03-17t132: Add TTB_BUFFER to resource reservedFurquan Shaikh
2015-03-17Tegra132: Configure CPU clockJimmy Zhang
2015-03-17t132: Add monotonic_timer.c to rmodules_armFurquan Shaikh
2015-03-17coreboot classes: Add dynamic classes to corebootFurquan Shaikh
2015-03-13nyan: Remove broken setup_display() from romstageJulius Werner
2015-03-13coreboot t132: Remove empty function cpu0_config_and_resetFurquan Shaikh
2015-03-13coreboot t132: Stop running AVP at the end of romstageFurquan Shaikh
2015-03-13tegra132: fix Rx FIFO underruns with slower SPI clockAaron Durbin
2015-03-13tegra132: Add Trust Zone register accessAaron Durbin
2015-03-13t132: Add mmu supportFurquan Shaikh
2015-03-13tegra132: Add code to setup chip operations and mem resources.Tom Warren
2015-03-13ryu: Add support for full LPDDR3 SDRAM BCT init via BootROMTom Warren
2015-03-13tegra132: split memory range querying to above/below 4GiBAaron Durbin
2015-03-12t132: handle optional Trust Zone region correctlyAaron Durbin
2015-03-07t132: add Kconfig option for MTS microcode directoryAaron Durbin
2015-03-07tegra132: add preboot MTS to bct generationAaron Durbin
2015-03-05tegra132: add support for TZ carve-outAaron Durbin
2015-03-05t132: handle carve-outs for addressable memoryAaron Durbin
2015-03-05t132: Enable cbmem console supportAaron Durbin
2015-03-05t132: bring up 64-bit denver coreAaron Durbin
2015-03-04coreboot t132: Stack init re-workFurquan Shaikh
2015-03-04t132: kick off core complex after loading MTS microcodeAaron Durbin
2015-03-04t132: load MTS microcodeAaron Durbin
2015-03-04t132: Replace fallback with CONFIG_CBFS_PREFIXMarc Jones
2015-03-04t132: Add shared romstageAaron Durbin
2015-03-04coreboot rush: Add dram init codeFurquan Shaikh
2015-03-04coreboot rush: Add support for basic romstageFurquan Shaikh
2015-03-04coreboot t132: Enable loading of romstage from CBFS mediaFurquan Shaikh
2015-03-04coreboot t132: Remove init pllx for nowFurquan Shaikh
2015-03-04coreboot t132,rush: Add mainboard specific bootblock_initFurquan Shaikh
2015-03-03coreboot t132: Add clock.c to all three stages of corebootFurquan Shaikh
2015-03-02coreboot arm: Define function for setting cntfrq registerFurquan Shaikh
2015-03-02tegra132: Enable bootblock support in tegra132 including UART supportFurquan Shaikh
2015-02-25tegra124: Clean up ARM UART driver buildMarc Jones
2015-02-17tegra132: Postprocess bootblock properlyPatrick Georgi
2015-02-17tegra132: Add BCT support in tegra132 socFurquan Shaikh
2015-02-17T124: perform ram_repair when CPU rail is powered on in warmbootYen Lin
2015-02-17T124: perform ram_repair when CPU rail is powered on in coldbootYen Lin
2015-02-17tegra124: Correct cpu power on sequence and CPUPWRGOOD_TIMEJimmy Zhang
2015-02-13tegra132: Fix build for verstageMarc Jones
2015-02-06include/types.h: Provide BIT() macroAlexandru Gagniuc
2015-01-27CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki
2015-01-27vboot2: implement select_firmware for pre-romstage verificationDaisuke Nojiri
2015-01-27vboot2: add verstageStefan Reinauer
2015-01-26tegra132: Add support for tegra132 socFurquan Shaikh
2015-01-14Revert "vboot2: add verstage"Paul Menzel
2015-01-13vboot2: add verstageDaisuke Nojiri
2015-01-09nyan*: I2C: Fix bus clear BC_TERMINATE naming.Tom Warren
2015-01-09tegra124: fix and fine tune the warm boot codeJoseph Lo
2015-01-09tegra: i2c: re-init i2c controller after resetJimmy Zhang
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2014-12-30tegra: i2c: Add a timeout to I2C bit clear recovery mechanismJulius Werner
2014-12-30i2c: Add software_i2c driver for I2C debugging and emulationJulius Werner
2014-12-30tegra124: Active dc/sor register change immediatelyVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-26tegra124: Add a utility function to read the cause of the most recent reset.Gabe Black
2014-12-26nyan*: I2C: Implement bus clear when 'ARB_LOST' error occursTom Warren
2014-12-19nyan*: Add fast link training functionsJimmy Zhang
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17nyan*: enable CLAMP_INPUTSKen Chang
2014-12-17ARM: Use LPAE for Virtual Address TranslationDaisuke Nojiri
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Allow "best" PLLD parameters for unmatched pixel clock.Hung-Te Lin
2014-12-16tegra124: Always enable DC when attaching SOR.Hung-Te Lin
2014-12-16nyan*: debug: Add sor registers dump functionJimmy Zhang
2014-12-16tegra124: clock: Enforce PLL constraints for VCO and CFJulius Werner
2014-12-16nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 registerJimmy Zhang
2014-12-16nyan*: merge a couple of sor setting difference from kernel driverJimmy Zhang
2014-12-16nyan*: Apply sor fix from kernel dc driverJimmy Zhang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-16i2c: Replace the i2c API.Gabe Black
2014-12-15tegra124: set MOT bit for I2C-over-AUXKen Chang
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-12-15tegra124: Release DMA channel at end of transactionDavid Hendricks
2014-12-15tegra124: Use correct mask for APB bus widthDavid Hendricks
2014-12-15nyan: Enable the cbmem console on nyan and allocate space for it in SRAM.Gabe Black
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-19 06:45:44 +0000