summaryrefslogtreecommitdiff
path: root/src/soc/nvidia/tegra124/display.c
AgeCommit message (Expand)Author
2016-07-27soc/nvidia/tegra124: remove cache_policiy optionAaron Durbin
2016-06-28tegra124: Actually align the framebuffer's bytes-per-line to 32Paul Kocialkowski
2016-05-09tegra124: Align the framebuffer's bytes-per-line to 32Paul Kocialkowski
2016-04-07edid: Make framebuffer row alignment configurableJulius Werner
2016-03-24edid: Add helper function to calculate bits-per-pixel dependent valuesJulius Werner
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-21arm(64): Globally replace writel(v, a) with write32(a, v)Julius Werner
2015-04-08tegra124: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-01-04tegra124: configure DP with correct pixel clockVince Hsu
2014-12-30tegra124: display clock should be initialized before any accessVince Hsu
2014-12-17tegra124: modify panel init sequenceKen Chang
2014-12-17tegra124: change PLLD VCO calculation algorithmKen Chang
2014-12-16tegra124: Initialize display panel by EDID.Hung-Te Lin
2014-12-15tegra124: Setup clock PLLD by approximating display panel pixel clock.Hung-Te Lin
2014-11-14t124: Clean up display init functionsJimmy Zhang
2014-11-12tegra124: Program PWM1 to drive panel backlightAndrew Chew
2014-11-12tegra124: nyan: Keep in memory structures below 4GB.Gabe Black
2014-10-22tegra/nyan*: sdram updatesTom Warren
2014-09-22tegra124/nyan: memory and display updatesAndrew Bresticker
2014-09-13tegra124/nyan: display, clock, and other updatesJulius Werner
2014-09-12tegra124/nyan: various fixes and additionsHung-Te Lin
2014-09-11tegra124/nyan: rougly stable code baseGabe Black