Age | Commit message (Expand) | Author |
---|---|---|
2015-01-04 | tegra124: configure DP with correct pixel clock | Vince Hsu |
2014-12-30 | tegra124: display clock should be initialized before any access | Vince Hsu |
2014-12-17 | tegra124: modify panel init sequence | Ken Chang |
2014-12-17 | tegra124: change PLLD VCO calculation algorithm | Ken Chang |
2014-12-16 | tegra124: Initialize display panel by EDID. | Hung-Te Lin |
2014-12-15 | tegra124: Setup clock PLLD by approximating display panel pixel clock. | Hung-Te Lin |
2014-11-14 | t124: Clean up display init functions | Jimmy Zhang |
2014-11-12 | tegra124: Program PWM1 to drive panel backlight | Andrew Chew |
2014-11-12 | tegra124: nyan: Keep in memory structures below 4GB. | Gabe Black |
2014-10-22 | tegra/nyan*: sdram updates | Tom Warren |
2014-09-22 | tegra124/nyan: memory and display updates | Andrew Bresticker |
2014-09-13 | tegra124/nyan: display, clock, and other updates | Julius Werner |
2014-09-12 | tegra124/nyan: various fixes and additions | Hung-Te Lin |
2014-09-11 | tegra124/nyan: rougly stable code base | Gabe Black |