coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-09-08	soc/mediatek/mt8192: Add SPI flash controller dual read function	CK Hu
	Support SPI flash dual read funciton which change spi mode (1-1-1) to dual mode (1-1-2). Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Iabd3668fc4bc42137b7743144fc1cced4fe72737 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44852 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-09-08	soc/mediatek/mt8192: Add SPI flash controller DMA read function	CK Hu
	To speed up SPI flash read, enable DMA read function. Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Ic1679ef7940258350feeadac50ad8ea407fd7b90 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
2020-08-28	soc/mediatek/mt8192: Use SPI-NOR as flash controller	CK Hu
	Add a SPI-NOR flash controller which supports pio mode. Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: I1e38672a532dd8234b3ef24c84113888c8795810 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>