coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-10-29	soc/mediatek/mt8192: Do dram full calibration	Huayang Duan
2020-10-23	soc/mediatek/mt8192: Turn off L2C SRAM and reconfigure as L2 cache	CK Hu
2020-10-22	soc/mediatek/mt8192: enable CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE	Ikjoon Jang
2020-10-20	soc/mediatek/mt8192: Do dram fast calibration	Huayang Duan
2020-10-12	soc/mediatek/mt8192: Refactor USB code among similar SoCs	Zhanyong Wang
2020-09-17	soc/mediatek/mt8192: Init PLL in bootblock	CK Hu
2020-09-17	soc/mediatek/mt8192: Add mtcmos init support	Weiyi Lu
2020-08-28	soc/mediatek/mt8192: Use SPI-NOR as flash controller	CK Hu
2020-08-17	soc/mediatek/mt8192: Initialize watch dog in bootblock	CK Hu
2020-08-17	soc/mediatek/mt8192: Initialize mmu in bootblock	CK Hu
2020-08-13	soc/mediatek/mt8192: Add DRAM resource in ramstage	CK Hu
2020-08-13	soc/mediatek/mt8192: Initialize build rules	CK Hu