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path: root/src/soc/mediatek/mt8186/pll.c
AgeCommit message (Expand)Author
2021-11-17soc/mediatek/mt8186: Enable DCMEdward-JW Yang
2021-11-15soc/mediatek/mt8186: Enable mmu operation for L2C SRAM and DMARex-BC Chen
2021-11-05soc/mediatek/mt8186: Add PLL and clock init supportChun-Jie Chen