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MMIO operations are arch-agnostic so the include
path should not be arch/.
Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Refactor function mtk_spi_set_gpio_pinmux to reduce compiled code size.
This change can save us about 552 bytes (before compression).
Idea from Julius's comment in https://review.coreboot.org/c/coreboot/+/27498/4
BRANCH=none
BUG=b:120588396
TEST=manually boot into kernel
Change-Id: I93bc88c535b6a2ff94e85f247cf2d51f60b9b29c
Signed-off-by: You-Cheng Syu <youcheng@google.com>
Reviewed-on: https://review.coreboot.org/c/30328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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This patch implements SOC-specific code of mt8183 and link the common
code to support SPI bus.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui
Signed-off-by: mengqi.zhang <mengqi.zhang@mediatek.com>
Change-Id: I544e850299c74861313c2425721479fe5b91639e
Reviewed-on: https://review.coreboot.org/27498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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The stub flash driver is a temporary hack that planned to adapt eMMC to
SPI flash. Remove the hack since SPI flash is what we really expect.
BUG=b:80501386
BRANCH=none
TEST=Boots fine on Kukui
Change-Id: If29869461fc8c2efe26bb8c901737ee85935d27f
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27114
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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Most things still need to be filled in, but this will allow us to build
boards which use this SOC.
BUG=b:80501386
BRANCH=none
TEST=timer and uart work fine
Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26659
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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