coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-12-04	Change all clrsetbits_leXX() to clrsetbitsXX()	Julius Werner
2019-10-23	soc/mediatek/mt8183: add dphy reset after setting lanes number	Jitao Shi
2019-10-23	soc/mediatek/mt8183: fine tune the phy timing	Jitao Shi
2019-08-15	soc/mediatek: Change DSI init commands to take flexible length array	Hung-Te Lin
2019-08-15	soc/mediatek/mt8183: Add DSI driver	Hung-Te Lin
2019-08-15	soc/mediatek: dsi: Support sending MIPI init commands	Hung-Te Lin
2019-08-15	soc/mediatek: dsi: Refactor video timing calculation	Hung-Te Lin
2019-08-14	soc/mediatek: dsi: Refactor PHY timing calculation	Hung-Te Lin
2019-08-13	soc/mediatek: dsi: Refactor MIPI TX configuration	Hung-Te Lin
2019-08-13	soc/mediatek: dsi: Unify format to bpp conversion	Hung-Te Lin
2019-08-13	soc/mediatek: Create common DSI driver from mt8173	Hung-Te Lin