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path: root/src/soc/intel
AgeCommit message (Expand)Author
2019-12-19soc/intel/tigerlake: Add required header files in pch.cAamir Bohra
2019-12-19src: Remove unused 'include <arch/cpu.h>'Elyes HAOUAS
2019-12-19src/soc/intel: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-19src: Use '#include <smp/node.h>' when appropriateElyes HAOUAS
2019-12-19src: Remove unused include <device/smbus_def.h>Elyes HAOUAS
2019-12-18src: Remove unused 'include <bootblock_common.h>'Elyes HAOUAS
2019-12-17soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MBWim Vervoorn
2019-12-17soc/intel/skylake: Add irq 11 to the LNK* _PRSWim Vervoorn
2019-12-17soc/intel/apollolake: add support for extracting LBP2 from IFWIJeremy Compostella
2019-12-17soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash rangeWim Vervoorn
2019-12-17src: Conditionally include TEVTFrans Hendriks
2019-12-16src/soc/intel/cannonlake: Bump MAX_CPU from 8->12Edward O'Callaghan
2019-12-16soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper LakeAamir Bohra
2019-12-163rdparty/fsp: Update to current master againNico Huber
2019-12-16soc/intel/common/block/chip/Kconfig: Fix minor whitespaceHimanshu Sahdev aka CunningLearner
2019-12-16soc/intel/tigerlake: Pick correct pmc base reg from pch typeMaulik V Vaghela
2019-12-14Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"Nico Huber
2019-12-14bootblock: Provide some common prototypesKyösti Mälkki
2019-12-13soc/intel/common: Add PCI device IDs for CMP-HGaggery Tsai
2019-12-12soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.hFurquan Shaikh
2019-12-11printf: Automatically prefix %p with 0xJulius Werner
2019-12-11soc/intel/tigerlake: Include soc common lpss header fileAamir Bohra
2019-12-11soc/intel/tigerlake: add soc implementation for ETR address APIAamir Bohra
2019-12-11soc/intel/Kconfig: Load Tiger Lake SOC KconfigAamir Bohra
2019-12-10soc/intel/common: Add Jasperlake Device IDsrkanabar
2019-12-10include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter
2019-12-093rdparts/fsp: Update fsp submoduleJohanna Schander
2019-12-09soc/intel/bsw/gpio: Factor out GPI macrosAngel Pons
2019-12-06soc/intel/skylake: Add option to control microcode update inclusionWim Vervoorn
2019-12-05soc/intel/braswell: Use common sb code for SPI lockdown configurationArthur Heymans
2019-12-03src: Add missing include <stdlib.h>Elyes HAOUAS
2019-12-03soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik
2019-12-03soc/intel/common/cse: Update comment for post-CAR global worldPatrick Georgi
2019-12-02soc/intel/cannonlake: Add gfx.asl fileMathew King
2019-12-02soc/intel: Intel graphics driver scans generic busMathew King
2019-12-02soc/intel/cannonlake: Fix compilationPraveen Hodagatta Pranesh
2019-12-02soc/intel/tigerlake: Change compilation based on TIGERLAKE_BASEMaulik V Vaghela
2019-12-02src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai
2019-12-02src/: Remove g_ prefixes and _g suffixes from variablesPatrick Georgi
2019-11-29{northbridge,soc,southbridge}: Don't use both of _ADR and _HIDElyes HAOUAS
2019-11-29soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-29soc/intel/braswell: Don't reinitialize SPI after lockdownArthur Heymans
2019-11-29soc/intel/braswell: Use sb/intel/common/spi.cArthur Heymans
2019-11-28soc/intel/tigerlake: select correct chipset based on soc KconfigMaulik V Vaghela
2019-11-28pci_ids: Update Intel Lewisburg SMBUS PCI IDJonathan Zhang
2019-11-28soc/intel/skl: Drop FSP_CAR remnantsNico Huber
2019-11-27soc/intel/skylake: Clean up report_cpu_info() functionUsha P
2019-11-27soc/intel/cannonlake: Disable USB2 PHY Power gatingSurendranath Gurivireddy
2019-11-27soc/intel/tigerlake: Fix smm_relocation_paramsKyösti Mälkki
2019-11-27soc/intel/baytrail: Don't reinitialize SPI after lockdownArthur Heymans
2019-11-27soc/intel/baytrail: Use sb/intel/common/spi.cArthur Heymans
2019-11-27soc/skylake: Write the P2SB IBDF and HBDF registers in corebootAngel Pons
2019-11-26soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-TSubrata Banik
2019-11-26soc/intel/cannonlake: Add chip config to override CPU flex ratioSubrata Banik
2019-11-26sb/intel/common/spi: Add Baytrail/Braswell supportArthur Heymans
2019-11-25soc/intel/tigerlake: Add Jasperlake soc KconfigMaulik V Vaghela
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-25soc/intel/broadwell: Fix 'dead increment'Elyes HAOUAS
2019-11-22soc/intel/icelake: Make CpuMpPpi implementation default for ICLSubrata Banik
2019-11-22soc/intel/common/intelblocks: Define PAD_CFG0_MODE_NF7Nick Vaccaro
2019-11-22intel/smm: Provide common smm_relocation_paramsKyösti Mälkki
2019-11-22soc/intel/skylake: Refactor pch_early_init() codeUsha P
2019-11-21Kconfig: Remove not found sourcesElyes HAOUAS
2019-11-21soc/intel/fsp_broadwell_de: Drop supportArthur Heymans
2019-11-21soc/intel/fsp_baytrail: Drop supportArthur Heymans
2019-11-20soc/intel/skylake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/icelake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/cannonlake: lockdown: lock global resetMichael Niewöhner
2019-11-20soc/intel/common: pmclib: make use of the new ETR address APIMichael Niewöhner
2019-11-20soc/intel/skylake: add soc implementation for ETR address APIMichael Niewöhner
2019-11-20cbfs: switch to region_device for location APIsAaron Durbin
2019-11-18include: Make stdbool.h a separate fileJulius Werner
2019-11-18*/Makefile: Always build enable_usbdebug.cArthur Heymans
2019-11-16intel/skylake: Use new PCIe RP devicetree updateNico Huber
2019-11-16soc/intel: Implement PCIe RP devicetree update based on LCAPNico Huber
2019-11-15soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is definedWim Vervoorn
2019-11-15soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()Subrata Banik
2019-11-15soc/intel/common: Make alignment proper for commentsSubrata Banik
2019-11-14soc/intel/tigerlake: Include few more Tigerlake device IDsSubrata Banik
2019-11-14cbfs: Stop checking master headerJulius Werner
2019-11-12soc/intel/tigerlake: Remove FSP-T option in KconfigArthur Heymans
2019-11-12soc/intel/icelake: Remove FSP-T option in KconfigArthur Heymans
2019-11-12arch/x86/car.ld: Rename suffix _start/_endArthur Heymans
2019-11-12soc/intel/tigerlake: Remove deprecated CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_T...Subrata Banik
2019-11-11soc/{cannonlake,skylake}: Remove unused 'rdmsr(MSR_CONFIG_TDP_NOMINAL)'Elyes HAOUAS
2019-11-11drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driverMichael Niewöhner
2019-11-11soc/intel/denverton_ns: make use of common cbmem_top_chipsetMichael Niewöhner
2019-11-11soc/intel/tigerlake: Fix cbmem_topArthur Heymans
2019-11-11soc/intel/quark: make use of common cbmem_top_chipsetMichael Niewöhner
2019-11-11soc/intel/apollolake: make use of common cbmem_top_chipsetMichael Niewöhner
2019-11-11fsp{rangeley,baytrail,broadwell_de}: Fix dead assignmentElyes HAOUAS
2019-11-11soc/intel/icelake: add soc implementation for ETR address APIMichael Niewöhner
2019-11-11soc/intel/cannonlake: add soc implementation for ETR address APIMichael Niewöhner
2019-11-11soc/intel/apollolake: add soc implementation for ETR address APIMichael Niewöhner
2019-11-11soc/intel/common: pmclib: add API to get ETR register addressMichael Niewöhner
2019-11-10soc/intel/broadwell: Use common sb code for SPI lockdown configurationArthur Heymans
2019-11-10soc/intel/broadwell: Don't reinitialize SPI after lockdownArthur Heymans
2019-11-10soc/intel/broadwell: Use common INTEL_SB SPI codeArthur Heymans
2019-11-10soc/intel/broadwell: Use common SB RTC codeArthur Heymans
2019-11-10sb/intel/common: Remove the SOUTHBRIDGE_INTEL_COMMON Kconfig symbolArthur Heymans