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path: root/src/soc/intel
AgeCommit message (Expand)Author
2014-12-30baytrail: Add defines and functions for GPNCOREKein Yuan
2014-12-28intel baytrail broadwell: Include microcode updatesKyösti Mälkki
2014-12-19fsp_baytrail: Initialize LPC pads in bootblock for port 80Martin Roth
2014-12-19fsp_baytrail: Remove GPIO_NC1 #defineMartin Roth
2014-12-19baytrail SOCs: Add missing comma in gpio.hMartin Roth
2014-12-17baytrail: initialize backlight PWM frequencyAaron Durbin
2014-12-17x86: Initialize SPI controller explicitly during PCH initDavid Hendricks
2014-12-17fsp_baytrail: Add code to read GPIOs in romstageMartin Roth
2014-12-16CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki
2014-12-16Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki
2014-12-09spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black
2014-12-09spi: Remove the spi_set_speed and spi_cs_is_valid functions.Gabe Black
2014-12-09fsp platfoms: add prototype & consolidate main entry-pointMartin Roth
2014-12-08intel/baytrail: Spelling fixesMartin Roth
2014-12-08intel/fsp_baytrail: Spelling fixesMartin Roth
2014-12-08intel/broadwell: Spelling fixesMartin Roth
2014-12-05fsp_baytrail: Update function disable codeMartin Roth
2014-12-05fsp_baytrail: Kconfig update for Gold 3 FSPMartin Roth
2014-12-05fsp_baytrail: Update microcode for Gold 3 FSP releaseMartin Roth
2014-12-05FSP platform microcode: Update to remove Kconfig variableMartin Roth
2014-12-05fsp_baytrail: remove register option for TSEG sizeMartin Roth
2014-12-05fsp_baytrail: update printk to use FSP_INFO_LEVELMartin Roth
2014-12-05fsp_baytrail: update for UPD_DEVICE_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update for UPD_SPD_CHECK macroMartin Roth
2014-12-05fsp_baytrail: update to add the UPD_DEFAULT_CHECK macroMartin Roth
2014-12-02Replace hlt with halt()Patrick Georgi
2014-12-01Mark non-executable files non-executablePatrick Georgi
2014-11-30Replace hlt() loops with halt()Patrick Georgi
2014-11-28ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-11-25intel: Remove IRQ1 from possible PIRQ assignemnt.Vladimir Serbinenko
2014-11-24intel/fsp_baytrail: add new CPUID for Baytrail I step D0Herve ELter
2014-11-21intel/fsp_baytrail: add Gold3 FSP supportYork Yang
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
2014-11-19broadwell: move to per-device ACPI.Vladimir Serbinenko
2014-11-19fsp_baytrail: Fix ACPI 'Object is not referenced' warningsMartin Roth
2014-11-19fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.hMartin Roth
2014-11-18baytrail: fix range checkPatrick Georgi
2014-11-13intel: use crosscompiler readelf, instead of globalPatrick Georgi
2014-11-09src: Too many terminators ';;' at end of stmts, stop SkynetEdward O'Callaghan
2014-11-08intel: Use 'FORCEWAKE_ACK_HSW' define over '0x130044'Edward O'Callaghan
2014-11-04Redundant addr '&' operator on func ptr's in struct initiatorEdward O'Callaghan
2014-11-01{cpu,soc}: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan
2014-10-28baytrail: Remove unused devicetree fieldsShawn Nematbakhsh
2014-10-28baytrail: gfx: Don't configure hotplug + backlight registersShawn Nematbakhsh
2014-10-28Baytrail/dptf: Always return 0 in TCPU._PPCKein Yuan
2014-10-28baytrail: handle MRC being an ELF fileAaron Durbin
2014-10-28baytrail: Configure MSR for 2-core and 4-core P-state configutationDuncan Laurie
2014-10-28baytrail: move cache-as-ram base address to 0xfe000000Aaron Durbin
2014-10-28baytrail: romstage: Add function to check SW WP status for vbootShawn Nematbakhsh
2014-10-22reg_script: default to n for ARCH_X86Isaac Christensen
2014-10-22cmos: Rename the CMOS related functions.Gabe Black
2014-10-22broadwell: Update Haswell and Broadwell E0 microcodeDuncan Laurie
2014-10-22broadwell: Update microcodeDuncan Laurie
2014-10-22broadwell: ACPI, romstage, and other updatesDuncan Laurie
2014-10-22broadwell: Update D0 microcode to FFFF000EDuncan Laurie
2014-10-22broadwell: Update microcode for supported CPUsDuncan Laurie
2014-10-22broadwell: add new intel SOCDuncan Laurie
2014-10-22baytrail: Move HDA verb table to Intel SOC common directoryDuncan Laurie
2014-10-22baytrail: Move MRC cache code to a common directoryDuncan Laurie
2014-10-22baytrail/rambi: S3 support and other updatesKein Yuan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-10-14intel/fsp_baytrail: Add padding so device_nvs location matches ACPIScott Radcliffe
2014-10-14baytrail: Add padding to the end of device_nvs to match ACPIScott Radcliffe
2014-10-14intel/fsp_baytrail: Clear the GNVS area prior to fillingScott Radcliffe
2014-10-09intel/fsp_baytrail: Include header for "southcluster_smm_save_gpio_route"Kayalvizhi Dhandapani
2014-10-09intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module addedKayalvizhi Dhandapani
2014-10-09intel/fsp_baytrail: Fix SMM/SMIKayalvizhi Dhandapani
2014-10-01baytrail: update C0 microcodeShawn Nematbakhsh
2014-09-29intel/fsp_baytrail: Add S3 suspend/resume SupportMohan D'Costa
2014-09-24baytrail: add 80c microcode for C0 partsAaron Durbin
2014-09-19baytrail/rambi: spi, charger, and audio updatesAaron Durbin
2014-09-18rambi/baytrail: ACPI, GPIO, audio, misc updatesShawn Nematbakhsh
2014-08-28soc/intel/baytrail/Kconfig: Remove empty line at top filePaul Menzel
2014-08-15Move baytrail-specific config to baytrail.Vladimir Serbinenko
2014-08-11soc/intel/fsp_baytrail: set up for including irqroute.h twiceMartin Roth
2014-08-01fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1Martin Roth
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
2014-07-17soc,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-17soc,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-14SPI: Split writes using spi_crop_chunk()Kyösti Mälkki
2014-07-08soc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05spi: Change spi_xfer to work in units of bytes instead of bits.Gabe Black
2014-07-05spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.Gabe Black
2014-06-23baytrail_fsp: Fix the mmconf KconfigMartin Roth
2014-06-23fsp_baytrail: Minor Kconfig updatesMartin Roth
2014-06-21intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki
2014-06-18fsp_baytrail: Add the default FSP locationMartin Roth
2014-06-18fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcodeMartin Roth
2014-06-18ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-06-13fsp_baytrail: remove version from default vbios pathMartin Roth
2014-06-13fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOTMartin Roth
2014-05-30cpu/intel/fsp_model_206ax: change realpath to readlinkMartin Roth
2014-05-29fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chipMartin Roth
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
2014-05-15baytrail: Add SOC thermal settingsDuncan Laurie
2014-05-15baytrail: Enable PCIe common clock and ASPMDuncan Laurie
2014-05-15baytrail: enable graphics turboAaron Durbin
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