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path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-11-29soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh
2020-11-29soc/intel/alderlake: Add lp5_ccc_config to the board memory configurationSridhar Siricilla
2020-11-28soc/intel/skl: correct OC pin skip value for disabled usb portsMichael Niewöhner
2020-11-27soc/intel/jasperlake: Enable VT-d and generate DMAR TableMeera Ravindranath
2020-11-25soc/intel/{broadwell,quark}: Drop `PEI_DATA` typedefAngel Pons
2020-11-24soc/intel/xeon_sp: Enable SMI handlerRocky Phagura
2020-11-24soc/intel/xeon_sp: Select INTEL_COMMON_BLOCK_TCOArthur Heymans
2020-11-24soc/intel/xeon_sp: Hook up the PMC driverArthur Heymans
2020-11-24soc/intel/skylake: Support NHLT 1ch DMICBenjamin Doron
2020-11-24soc/intel/skylake: Use correct NHLT_PDM_DEV definitionBenjamin Doron
2020-11-23soc/intel/cannonlake: Add ICC limits for CFL-S DT 4Angel Pons
2020-11-23soc/intel/denverton_ns: Hook up SMMSTOREAngel Pons
2020-11-23soc/intel/alderlake: Update UART0 GPIO as per latest schematicsSubrata Banik
2020-11-23soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZESubrata Banik
2020-11-22soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-22soc/intel/tigerlake: Fix overlapping memory address used for early GSPI2 and ...Bora Guvendik
2020-11-22soc/intel/xeon_sp: Work around FSP-T not respecting its own APIArthur Heymans
2020-11-22soc/intel/block/pmclib.c: Properly guard apm_control()Arthur Heymans
2020-11-22soc/intel/common/pmc.c Don't implement a weak function that diesArthur Heymans
2020-11-22soc/intel/block/pmc: Only include the PCI driver when it is not hiddenArthur Heymans
2020-11-22soc/intel/block/pmc: Move pmc_set_acpi_mode() to pmc_lib.cArthur Heymans
2020-11-22soc/intel/denverton_ns: Convert to ASL 2.0 syntaxElyes HAOUAS
2020-11-22soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T outputFrans Hendriks
2020-11-20soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBERArthur Heymans
2020-11-20soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDFArthur Heymans
2020-11-20soc/intel/xeon_sp: Use common P2SB functions to generate HPET IOAPICArthur Heymans
2020-11-20soc/intel/apollolake: use P2SB function to generate DMAR IOAPICArthur Heymans
2020-11-20soc/intel/common/block/p2sb: Add ioapic BDF functionsArthur Heymans
2020-11-20soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMARArthur Heymans
2020-11-20soc/intel/apollolake: use P2SB function to generate DMAR HPETArthur Heymans
2020-11-20soc/intel/common/block/p2sb: Add hpet BDF functionsArthur Heymans
2020-11-20soc/intel/common/p2sb: Add helper function to determine p2sb stateArthur Heymans
2020-11-20soc/intel/xeon_sp: Lock down DMICTLArthur Heymans
2020-11-20soc/intel/xeon_sp/cpx: Lock down P2SB SBIArthur Heymans
2020-11-20soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callbackArthur Heymans
2020-11-20soc/intel/denverton_ns: Initialize thermal configurationJulien Viard de Galbert
2020-11-20soc/intel/denverton_ns: Enable MC ExceptionJulien Viard de Galbert
2020-11-20src/soc/intel/denverton_ns: Use improvement in coreboot since 4.9Julien Viard de Galbert
2020-11-20soc/intel/common: Use per-soc definition for BAR sizesDuncan Laurie
2020-11-20soc/intel/common/block/cse: Clear post code before resetDuncan Laurie
2020-11-20soc/intel/tigerlake: Enable GPIO IOSTANDBY configurationDuncan Laurie
2020-11-20soc/intel/tigerlake: Expose UPD to enable Precision Time MeasurementDuncan Laurie
2020-11-20soc/intel/tigerlake: Enable RTD3 driver and IPC mailboxDuncan Laurie
2020-11-20soc/intel/common: Add PCIe Runtime D3 driver for ACPIDuncan Laurie
2020-11-20soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPDMichael Niewöhner
2020-11-20soc/intel/common/acpi: add _HID to PEPDMichael Niewöhner
2020-11-20soc/intel/common/acpi: correct return value for PEPD enum functionMichael Niewöhner
2020-11-20soc/intel/common/acpi: work around Windows crash on S0ix-enabled boardsMichael Niewöhner
2020-11-20soc/intel/common/acpi: drop return value for disabled PEPD function 2Michael Niewöhner
2020-11-20soc/intel/common/acpi: rename PEPD/LPI macros for clarificationMichael Niewöhner
2020-11-19soc/intel/common/acpi: rename LPID to PEPDMichael Niewöhner
2020-11-19soc/intel/common/acpi: move S0ix UUID to the conditionMichael Niewöhner
2020-11-19soc/intel/common/acpi: drop the southridge scope around PEPDMichael Niewöhner
2020-11-18soc/intel/common: Move CSE RW into new FMAP region to optimize boot timeSridhar Siricilla
2020-11-18soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/BV Sowmya
2020-11-18soc/intel/common: Add Kconfig to enable the CSE FW Update featureV Sowmya
2020-11-18soc/intel/common: Add Kconfig for CSE RW firmware versionV Sowmya
2020-11-17soc/intel/xeon_sp: Fix SKX SATA drive boot issueMarc Jones
2020-11-17src: Add missing 'include <console/console.h>'Elyes HAOUAS
2020-11-16src: Update some incorrect config options in commentsMartin Roth
2020-11-16soc/intel/denverton_ns: Generate ACPI DMAR TableJulien Viard de Galbert
2020-11-16soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id'sArthur Heymans
2020-11-16soc/intel/broadwell/systemagent.c: Rename to `northbridge.c`Angel Pons
2020-11-16lp4x: Add new memory parts and generate SPDsDavid Wu
2020-11-14soc/intel/cnl: enable ACPI CPPC entries generationMichael Niewöhner
2020-11-14soc/intel/common/block: add code for ACPI CPPC entries generationMichael Niewöhner
2020-11-14soc/intel/xeon_sp: Improve generating PCH IOAPIC MADT entryArthur Heymans
2020-11-13mrc_cache: Move code for triggering memory training into mrc_cacheShelley Chen
2020-11-13soc/intel/cnl: replace the remains of HeciEnabled by device state in dtMichael Niewöhner
2020-11-13soc/intel/tigerlake: Add code for early tcssBrandon Breitenstein
2020-11-13soc/intel/xeon_sp/acpi.c Loop over HOB stack for MADT generationArthur Heymans
2020-11-13soc/intel/xeon_sp: move get_iiostack_info() to a common placeArthur Heymans
2020-11-13soc/intel/xeon_sp: Change the return type of get_iio_stack_info()Arthur Heymans
2020-11-13soc/intel/common/block/acpi: add Kconfig for CPPC entries generationMichael Niewöhner
2020-11-13soc/intel/{skl,cnl}: replace PM ACPI timer dt option by KconfigMichael Niewöhner
2020-11-13soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disablingMichael Niewöhner
2020-11-13soc/intel/common: add Kconfig to enable/disable the ACPI PM timerMichael Niewöhner
2020-11-13soc/intel/broadwell: Split up acpi.cAngel Pons
2020-11-13soc/intel/broadwell: Flatten northbridge folder structureAngel Pons
2020-11-13soc/intel/broadwell: Relocate CPU filesAngel Pons
2020-11-13broadwell: Flatten `acpi_init_gnvs` functionAngel Pons
2020-11-13broadwell: Factor out `acpi_fill_madt` functionAngel Pons
2020-11-13soc/intel/broadwell/acpi: Rename `systemagent.asl`Angel Pons
2020-11-13soc/intel/broadwell/pch/acpi/hda.asl: Rename to `audio.asl`Angel Pons
2020-11-13soc/intel/broadwell/pch/acpi: Clean up cosmeticsAngel Pons
2020-11-13soc/intel/xeon_sp: Tidy up adding MADT ioapic entriesArthur Heymans
2020-11-12soc/intel/xeon_sp: Use a common function to get the IIO HOBArthur Heymans
2020-11-12soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik
2020-11-11mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOSShreesh Chhabbi
2020-11-11soc/intel/tigerlake: Update Kconfig for NEM Enhanced ModeShreesh Chhabbi
2020-11-10soc/intel/tigerlake: Log PM event from an internal deviceKarthikeyan Ramasubramanian
2020-11-10soc/intel/jasperlake: Log PM event from an internal deviceKarthikeyan Ramasubramanian
2020-11-09soc/intel/skylake: Enable PCH thermal depending on devicetreeBenjamin Doron
2020-11-09soc/intel/jasperlake: Enable Intel FIVR RFI settingsMaulik V Vaghela
2020-11-09soc/intel/xeon_sp: Don't add memory resource twiceMarc Jones
2020-11-09soc/intel/xeon_sp: Move set_bios_init_completion()Marc Jones
2020-11-09soc/intel/xeon_sp: Look up the IIO_HOB only onceArthur Heymans
2020-11-09soc/intel/jasperlake: Correct GPIO pad sequence for community pad groupMaulik V Vaghela
2020-11-09soc/intel/jasperlake: Update reserved GPIO names in gpio_soc_defs.hMaulik V Vaghela
2020-11-09soc/intel/jasperlake: Add PCH PCIe RPs wake up events to event logTim Wawrzynczak