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Author
2020-05-26
soc/intel/skylake/acpi/smbus.asl: Fix typo in comment
Elyes HAOUAS
2020-05-26
Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION
Kyösti Mälkki
2020-05-26
cannonlake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-26
soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method
John Zhao
2020-05-26
soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip options
Christian Walter
2020-05-26
intel/cannonlake: Implement PCIe RP devicetree update
Nico Huber
2020-05-26
soc/intel/jasperlake: correct IRQ routing Jasper Lake
Ronak Kanabar
2020-05-23
soc/intel/broadwell: Use SPDX identifier
Jacob Garber
2020-05-23
soc/intel/common/block: Update SA resource length to support 64 bit
Subrata Banik
2020-05-23
soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value
Subrata Banik
2020-05-22
soc/intel/tigerlake: Provide SoundWire controller properties
Duncan Laurie
2020-05-22
soc/intel/tigerlake: Add definition for PMC EPOC
Duncan Laurie
2020-05-21
soc/intel/tigerlake: Make audio devices scan the bus
Duncan Laurie
2020-05-20
tigerlake: enable DPTF functionality for volteer
Sumeet R Pawnikar
2020-05-20
soc/intel/tigerlake: Add TCSS devices to soc_acpi_name()
Duncan Laurie
2020-05-20
soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutil
Tim Wawrzynczak
2020-05-20
soc/intel/tigerlake: Move PMC PCI resources under PMC device
Tim Wawrzynczak
2020-05-20
tigerlake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-20
icelake: remove unused processor power limits configuration
Sumeet R Pawnikar
2020-05-20
soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfg
Brandon Breitenstein
2020-05-20
soc/intel/jasperlake: Add ACPI method to get GPIO PCR PID
Aamir Bohra
2020-05-20
soc/intel/common/acpi: Remove gpio community range
Aamir Bohra
2020-05-20
soc/intel/broadwell: Mask lower 20 bits of TOLUD and TOLM in systemagent.asl
Furquan Shaikh
2020-05-20
soc/intel/broadwell: Update systemagent.asl to ASL2.0 syntax
Furquan Shaikh
2020-05-20
soc/intel/skylake: Mask lower 20 bits of TOLUD and TOLM in systemagent.asl
Furquan Shaikh
2020-05-20
soc/intel/skylake: Update systemagent.asl to ASL2.0
Furquan Shaikh
2020-05-20
soc/intel/common/block/acpi: Fix error in shift operation for GPCL
Furquan Shaikh
2020-05-18
src: Remove unused 'include <string.h>'
Elyes HAOUAS
2020-05-18
src: Remove unused 'include <lib.h>'
Elyes HAOUAS
2020-05-18
soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En
John Zhao
2020-05-18
broadwell: update processor power limits configuration
Sumeet R Pawnikar
2020-05-18
soc/intel/jasperlake: Add function to display ME firmware status info
Krishna Prasad Bhat
2020-05-18
soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect override
Eric Lai
2020-05-18
skylake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-18
soc/intel/common/block/smbus: Use i2c read eeprom to speedup SPD read
Wim Vervoorn
2020-05-18
jasperlake: update processor power limits configuration
Sumeet R Pawnikar
2020-05-18
soc/intel/common: add processor power limits control support
Sumeet R Pawnikar
2020-05-18
soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method
John Zhao
2020-05-18
src: Remove leading blank lines from SPDX header
Elyes HAOUAS
2020-05-17
soc/intel/common: Rename cse_is_hfs3_fw_sku_custom()
Sridhar Siricilla
2020-05-17
soc/intel/common/block/acpi: Mask lower 20 bits of TOLUD
Furquan Shaikh
2020-05-17
soc/intel/common/block/acpi: Update northbridge.asl to ASL2.0 syntax
Furquan Shaikh
2020-05-15
soc/intel: Correct comment on HMRFPO_ENABLE HECI command
Sridhar Siricilla
2020-05-14
soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()
Furquan Shaikh
2020-05-14
soc/intel: Always advertise MMIO window above 4G in ACPI tables
Furquan Shaikh
2020-05-14
soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G
Furquan Shaikh
2020-05-13
lib/spd_bin: add get_spd_sn function
Jamie Chen
2020-05-13
src/mainboard: Remove unused 'include <stdlib.h>'
Elyes HAOUAS
2020-05-13
src: Remove unused '#include <stddef.h>'
Elyes HAOUAS
2020-05-13
src: Remove unused '#include <stdint.h>'
Elyes HAOUAS
2020-05-12
soc/intel/skylake: Add ability to set root port ASPM
Wim Vervoorn
2020-05-12
soc/intel/tigerlake: Correct IRQ interrupt
Wonkyu Kim
2020-05-12
device/pci_device: Extract pci_domain_set_resources from SOC
Raul E Rangel
2020-05-12
soc/intel/jasperlake: Remove deprecated UPDs
Ronak Kanabar
2020-05-12
soc/intel/jasperlake: Add SATA related UPDs configuration
Ronak Kanabar
2020-05-12
soc/intel/tigerlake: Control SATA and DMI power optimization
Shaunak Saha
2020-05-12
soc/intel/skl: Drop weak mainboard_memory_init_params
Angel Pons
2020-05-11
soc/intel/quark: Revamp file headers
Patrick Georgi
2020-05-11
treewide: Replace BSD-3-Clause and ISC headers with SPDX headers
Patrick Georgi
2020-05-11
treewide: split off license text, remove extra copyright notices
Patrick Georgi
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-11
soc/intel/skylake: Allow setting of PcieRpMaxPayload
Wim Vervoorn
2020-05-11
soc/intel/tigerlake: Update C-State info
Wonkyu Kim
2020-05-11
soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX
Michael Niewöhner
2020-05-11
soc/intel/jasperlake: Add ACPI device name for Storage controllers
Karthikeyan Ramasubramanian
2020-05-11
soc/intel/jasperlake: Enable end of post support in FSP
Aamir Bohra
2020-05-10
src: Replace remaining GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-05-09
src/: Replace GPL boilerplate with SPDX headers
Patrick Georgi
2020-05-09
vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()
Julius Werner
2020-05-08
{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-05-08
soc/intel: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-05-08
soc/intel/skl: Drop `acpi_mainboard_gnvs`
Angel Pons
2020-05-07
soc/intel/tigerlake: Add PMC to platform ACPI name entry
John Zhao
2020-05-06
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-06
soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel
Shaunak Saha
2020-05-06
soc/intel/tigerlake: Print HPR_CAUSE0 register
derek.huang
2020-05-05
soc/intel/jasperlake: Correct the EMMC PCR Port ID
Ronak Kanabar
2020-05-05
soc/intel/jasperlake: Allow SD card power enable polarity configuration
Ronak Kanabar
2020-05-05
soc/intel/tigerlake: Add PMC mux control
John Zhao
2020-05-04
soc/intel/tigerlake: Update interrupt setting
Wonkyu Kim
2020-05-04
src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-M
Srinidhi N Kaushik
2020-05-04
soc/intel/skl: always enable SataPwrOptEnable
Michael Niewöhner
2020-05-04
soc/intel/cannonlake: Add DisableHeciRetry to config
Christian Walter
2020-05-04
soc/intel/common/block/cse: Add boot partition related APIs
Sridhar Siricilla
2020-05-02
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-01
soc/intel/xeon_sp/cpx: Implement hide/unhide P2SB traditional dance
Andrey Petrov
2020-05-01
soc/intel/xeon_sp/cpx: Enable common P2SB
Andrey Petrov
2020-05-01
soc/intel/xeon_sp: Add C620 p2sb.h
Andrey Petrov
2020-05-01
xeon_sp, ocp/tiogapass: remove unused FSP-style GPIO defs
Maxim Polyakov
2020-05-01
soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/common: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register
Elyes HAOUAS
2020-05-01
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...
Subrata Banik
2020-05-01
soc/intel/jasperlake: fix args of dimm_info_fill() for dram_part_num
Marco Chen
2020-05-01
soc/intel/cannonlake/bootblock: Fix FSP CAR
Patrick Rudolph
2020-05-01
soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetree
Meera Ravindranath
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