coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-08-01	soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated	Subrata Banik
2020-07-31	soc/intel/cannonlake: Fix DMAR when no iGPU is present	Patrick Rudolph
2020-07-31	soc/intel/xeon_sp/cpx: configure DIMM_MAX and DIMM_SPD_SIZE	Jonathan Zhang
2020-07-30	smbios: Fix type 17 for Windows 10	Patrick Rudolph
2020-07-29	soc/intel/tigerlake: Configure TCSS D3Hot and D3Cold	John Zhao
2020-07-29	soc/intel/skylake: Enable HDA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable HECI3 depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable eMMC depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable TraceHub depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SMBus depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable LAN depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SATA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dB	Duncan Laurie
2020-07-29	soc/intel/jasperlake: Clean up report_cpu_info() function	Usha P
2020-07-28	src: Never set ISA Enable on PCI bridges	Angel Pons
2020-07-28	soc/intel/braswell/fadt.c: Use `ACPI_ADDRESS_SPACE_IO` macro	Angel Pons
2020-07-28	broadwell: Factor out PIRQ routing from devicetree	Angel Pons
2020-07-28	soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled	Felix Singer
2020-07-28	soc/intel/apollolake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	soc/intel/jasperlake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	soc/intel/tigerlake: Simplify is-device-enabled checks	Felix Singer
2020-07-28	Revert "src: Remove unused include <cpu/x86/smm.h>"	Patrick Rudolph
2020-07-27	soc/intel/jasperlake: Invoke PCIe root port swapping	Karthikeyan Ramasubramanian
2020-07-26	soc/intel/tigerlake: Disable CPU PCIe in FSP	Shaunak Saha
2020-07-26	soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform	John Zhao
2020-07-26	soc/intel/common/basecode: Implement CSE update flow	Rizwan Qureshi
2020-07-26	src/soc/intel: Add include <types.h>	Elyes HAOUAS
2020-07-26	soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG	Maxim Polyakov
2020-07-26	soc/intel/common/hda: Add HDA ID for Jasper Lake	yan.liu
2020-07-26	soc/intel/jasperlakelake: Rename pch_init() code	Usha P
2020-07-26	src: Update bare access to BOOL CONFIG_ vals to CONFIG()	Martin Roth
2020-07-26	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth
2020-07-26	src: Remove whitespace between 'sizeof' and '('	Elyes HAOUAS
2020-07-26	{sb,soc}/intel/*/.c: Use macros for PCI COMMAND bits	Angel Pons
2020-07-26	cpu,soc/intel: Drop select SMP	Kyösti Mälkki
2020-07-26	src: Remove unused 'include <cbmem.h>'	Elyes HAOUAS
2020-07-26	src: Remove extra lines in license header	Elyes HAOUAS
2020-07-26	skylake boards: Factor out copy-pasted PIRQ routes	Angel Pons
2020-07-26	src: Remove unused include <cpu/x86/smm.h>	Elyes HAOUAS
2020-07-26	soc/skylake: Configure SATA options only if SATA is enabled	Felix Singer
2020-07-25	soc/intel/baytrail/southcluster.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/include/soc/irq.h: Add braces	Angel Pons
2020-07-25	soc/intel/baytrail: Simplify pattrs definitions	Angel Pons
2020-07-25	soc/intel/baytrail/smm.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/smihandler.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/sd.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpss.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/lpe.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/{baytrail,braswell}: Drop unneeded `return`	Angel Pons
2020-07-25	soc/intel/baytrail/iosf.c: Add missing braces	Angel Pons
2020-07-25	soc/intel/baytrail/elog.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/cpu.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/acpi.c: Align with Braswell	Angel Pons
2020-07-25	soc/intel/baytrail/bootblock/bootblock.c: Move functions	Angel Pons
2020-07-25	soc/intel/baytrail: Retype some pointers	Angel Pons
2020-07-25	soc/intel/tigerlake: Update Pkg C-State latencies	Ravi Sarawadi
2020-07-25	soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU	Sumeet R Pawnikar
2020-07-25	soc/intel/tigerlake: Update Tiger Lake SA IDs	Derek Huang
2020-07-24	soc/intel/common/gpio_defs: Remove unused macro for NF	Maxim Polyakov
2020-07-24	soc/intel/common/gpio_defs: Undo set TxDRxE in GPI_TRIG_OWN()	Maxim Polyakov
2020-07-24	soc/intel/common/gpio_defs: Improve some GPI macros	Maxim Polyakov
2020-07-23	soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fields	Jonathan Zhang
2020-07-23	soc/intel/jasperlake: Add the SkipCpuReplacementCheck configuration	V Sowmya
2020-07-22	soc/intel/jasperlake: Move tco_configure to bootblock	Tim Wawrzynczak
2020-07-22	soc/intel/cannonlake: Move tco_configure to bootblock	Tim Wawrzynczak
2020-07-21	soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2	Subrata Banik
2020-07-21	src: Use ACPI macros	Elyes HAOUAS
2020-07-21	soc/intel/baytrail: Add new CPUID 0x30679	Mate Kukri
2020-07-21	soc/intel/xeon_sp/cpx: remove unused gpio.h	Maxim Polyakov
2020-07-20	src: Report word-sized access for PM1a_EVT	Angel Pons
2020-07-20	src: Make HAVE_CF9_RESET set the FADT reset register	Angel Pons
2020-07-20	src: Drop useless cache flush settings in FADT	Angel Pons
2020-07-20	src: Never overwrite `fadt->flags`	Angel Pons
2020-07-20	soc/intel/xeon_sp/skx: Clean up FADT	Angel Pons
2020-07-20	src: Drop useless PM1b settings from FADT	Angel Pons
2020-07-20	src: Drop useless GPE1 settings from FADT	Angel Pons
2020-07-20	soc/intel/cannonlake: Add configs for USB 3.1 Gen2 EV settings	Jamie Chen
2020-07-19	soc/intel/common/gpio_defs: Fix coding style	Maxim Polyakov
2020-07-16	soc/intel/common/block/pmc: Select PMC on mainboard basis	Tim Chu
2020-07-16	mb/ocp/deltalake: Config PCH PCIe ports in devicetree	Morgan Jang
2020-07-15	soc/intel/tigerlake: Hook up SATA Port Enable DITO UPDs	Shaunak Saha
2020-07-15	PCI IDs: Add PCI ID for JSL DPTF/DTT PCI device	Tim Wawrzynczak
2020-07-14	soc/intel/skylake: Move `acpi_fill_fadt` to fadt.c	Angel Pons
2020-07-14	soc/intel/braswell: Move `acpi_fill_fadt` to fadt.c	Angel Pons
2020-07-14	soc/intel/baytrail: Move `acpi_fill_fadt` to fadt.c	Angel Pons
2020-07-14	soc/intel/broadwell: Move `acpi_fill_fadt` to fadt.c	Angel Pons
2020-07-14	src: Drop unused <cpu/x86/tsc.h> include	Elyes HAOUAS
2020-07-14	src: Remove unused 'include <cpu/x86/msr.h>'	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/northcluster.c: Add missing include	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/romstage/pmc.c: Add missing include	Elyes HAOUAS
2020-07-14	soc/intel/baytrail/romstage/raminit.c: Add missing include	Elyes HAOUAS
2020-07-14	soc/intel/braswell/romstage/romstage.c: Add missing include	Elyes HAOUAS
2020-07-14	src: Remove unused 'include <stdint.h>	Elyes HAOUAS
2020-07-14	src: Remove unused 'include <types.h>'	Elyes HAOUAS
2020-07-12	soc/intel/baytrail: Add dedicated devices for MMC and MMC 4.5 controller	Mate Kukri
2020-07-12	soc/intel/gpio: Convert PAD_CFG0_ROUTE_* to PAD_IRQ_ROUTE()	Maxim Polyakov
2020-07-12	soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()	Maxim Polyakov
2020-07-12	intel/gpio: Convert PAD_CFG0_TRIG_* to PAD_TRIG()	Maxim Polyakov
2020-07-12	soc/intel/common/block/pcie: Select ASPM on mainboard basis	Christian Walter