Age | Commit message (Expand) | Author |
2020-09-21 | soc/intel: rename get_prmrr_size | Michael Niewöhner |
2020-09-21 | soc/intel/common/block/sgx: drop no-ops from PRMRR Kconfig | Michael Niewöhner |
2020-09-21 | soc/intel/common/block/sgx: make PRMRR size setting depend on SGX | Michael Niewöhner |
2020-09-21 | soc/intel/common/cse_lite: Defer cse_fw_sync for JSL | Karthikeyan Ramasubramanian |
2020-09-21 | soc/intel/skylake: acpi: drop HWP's dependency on EIST | Michael Niewöhner |
2020-09-21 | soc/intel/xeon_sp: Enable PMC support | Rocky Phagura |
2020-09-21 | soc/intel/xeon_sp/cpx: search IIO_UDS HOB once when creating DMAR table | Jonathan Zhang |
2020-09-21 | soc/intel/xeon_sp/cpx: remove DMAR_X2APIC_OPT_OUT flag | Jonathan Zhang |
2020-09-21 | soc/intel/jsl: Use the common code to set the PchPmPwrCycDur | V Sowmya |
2020-09-21 | soc/intel/cnl: Use the common code to set the PchPmPwrCycDur | V Sowmya |
2020-09-19 | soc/intel/common/block/cse: Refactor cse_request_global_reset() function | Subrata Banik |
2020-09-17 | soc/intel/cannonlake: add missing special function pads | Michael Niewöhner |
2020-09-17 | soc/intel/cannonlake: rename "RSVD" GPIOs to their correct names | Michael Niewöhner |
2020-09-17 | mb/volteer: Select USE_CAR_NEM_ENHANCED_V2 for Tigerlake QS based | Shreesh Chhabbi |
2020-09-17 | soc/intel/cannonlake: fix GPIO community numbering in ACPI | Michael Niewöhner |
2020-09-17 | soc/intel/common/block/chip: Refactor chip_get_common_soc_structure() | Subrata Banik |
2020-09-17 | soc/intel/common/block: Add NULL check for 'ctx' pointer | Subrata Banik |
2020-09-16 | soc/intel/common/block: Do not die if PRMRR size unsupported | Angel Pons |
2020-09-16 | xeon_sp/skx: Reorder pci_devs.h | Marc Jones |
2020-09-16 | xeon_sp/cpx/pci_devs.h: Remove duplicate defines | Marc Jones |
2020-09-15 | soc/intel/alderlake/romstage: Do initial SoC commit till romstage | Subrata Banik |
2020-09-15 | soc/intel/common/block/cpu: Fix boot failure | Patrick Rudolph |
2020-09-15 | common/block/pmc: Add a check to program the PchPmPwrCycDur | V Sowmya |
2020-09-14 | soc/intel/common/block: Use pci_dev_request_bus_master for BM enabling | Subrata Banik |
2020-09-14 | soc/intel/{cnl,icl,jsl,tgl}: Clean up chip.h | Subrata Banik |
2020-09-14 | soc/intel/jasperlake: Clean up iomap.h and systemagent.h | Subrata Banik |
2020-09-14 | soc/intel/cnl: Add ACPI support for PMC core OS driver | Michael Niewöhner |
2020-09-14 | soc/intel/xeon_sp/cpx: display FSP_PREV_BOOT_ERR_SRC_HOB | Jonathan Zhang |
2020-09-14 | soc/intel/tigerlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 8KB | Anil Kumar |
2020-09-14 | soc/intel/tigerlake: Select USE_CAR_NEM_ENHANCED_V2 for tigerlake | Shreesh Chhabbi |
2020-09-14 | soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode | Aamir Bohra |
2020-09-12 | soc/intel/common/block/*/Kconfig: Guard options with if-blocks | Angel Pons |
2020-09-12 | soc/intel/denverton_ns/uart_debug: include header for uart_platform_base | Felix Held |
2020-09-12 | include/console/uart: make index parameter unsigned | Felix Held |
2020-09-11 | soc/intel/tigerlake: Clean up systemagent.h | Subrata Banik |
2020-09-10 | soc/intel/alderlake: Rename pch_init() code | Subrata Banik |
2020-09-10 | soc/intel/tigerlake: Maintain consistent tab in iomap.h | Subrata Banik |
2020-09-09 | soc/intel/common/block/imc: Drop unused code | Angel Pons |
2020-09-09 | soc/intel/common/block/uart/Kconfig: Drop unused symbols | Angel Pons |
2020-09-09 | soc/intel/xeon_sp: Select CPU_INTEL_COMMON | Angel Pons |
2020-09-09 | soc/intel/cannonlake: Add PCIe ports on PCH-H | Patrick Rudolph |
2020-09-09 | apollolake: Define MAX_CPUS at SoC scope | Angel Pons |
2020-09-09 | geminilake: Factor out MAX_CPUS value | Angel Pons |
2020-09-09 | soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol | Angel Pons |
2020-09-09 | vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332 | Subrata Banik |
2020-09-08 | pci_ids: Add Alder Lake DTT PCI IDs | Subrata Banik |
2020-09-08 | pci_ids: Add Alder Lake IPU PCI IDs | Subrata Banik |
2020-09-08 | soc/intel/baytrail: Add missing GSM size definitions | Angel Pons |
2020-09-08 | soc/intel/denverton_ns/Kconfig: Drop unused 'IQAT_MEMORY_REGION_SIZE' | Elyes HAOUAS |
2020-09-08 | soc/intel/tigerlake: Skip GPIO configuration from FSP | Srinidhi N Kaushik |
2020-09-08 | soc/intel/elkhartlake: Update SA & PM related definitions | Tan, Lean Sheng |
2020-09-08 | soc/intel/elkhartlake: Update PMC related register definitions | Tan, Lean Sheng |
2020-09-08 | soc/intel/elkhartlake: Add CPU, SA, PCH & IGD DIDs Table | Tan, Lean Sheng |
2020-09-08 | soc/intel/elkhartlake/acpi: Copy acpi directory from jasperlake | Tan, Lean Sheng |
2020-09-08 | soc/intel/elkhartlake: Do initial SoC commit till ramstage | Tan, Lean Sheng |
2020-09-08 | soc/intel/apollolake: Hook up ENABLE_VMX | Angel Pons |
2020-09-08 | soc/intel/apollolake: Select CPU_INTEL_COMMON | Angel Pons |
2020-09-08 | soc/intel/broadwell: Drop `gpu_panel_port_select` | Angel Pons |
2020-09-08 | soc/intel/tigerlake: Add SMRR Locking support | Tim Wawrzynczak |
2020-09-08 | soc/intel/common: Add SMRR Lock Supported bit definition for MTRR_CAP | Tim Wawrzynczak |
2020-09-06 | soc/intel/apl: Add panel power and backlight configuration | Nico Huber |
2020-09-06 | soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default | Michael Niewöhner |
2020-09-05 | soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock | Subrata Banik |
2020-09-04 | soc/intel/{jasperlake,tigerlake}/Kconfig: Drop redundant 'select CPU_INTEL_CO... | Elyes HAOUAS |
2020-09-04 | soc/intel/cnl: Enable HECI3 depending on devicetree | Felix Singer |
2020-09-04 | soc/intel/tigerlake: Remove unused PID_SDX macro | Subrata Banik |
2020-09-03 | soc/intel/cnl: Allow using the remaining Comet Lake FSPs | Felix Singer |
2020-09-03 | 3rdparty/fsp: Update submodule pointer to current master | Felix Singer |
2020-09-03 | soc/intel/cnl: Add new Kconfig option which matches its FSPs name | Felix Singer |
2020-09-02 | soc/intel/tigerlake: Add mainboard hook for overriding SoC config | Jes Klinke |
2020-09-02 | soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE' | Elyes HAOUAS |
2020-09-02 | {nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a) | Elyes HAOUAS |
2020-09-01 | {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent | Subrata Banik |
2020-08-31 | soc/intel/elkhartlake/romstage: Do initial SoC commit till romstage | Tan, Lean Sheng |
2020-08-31 | soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblock | Tan, Lean Sheng |
2020-08-29 | PCI IDs: Add PCI ID for CML DPTF/DTT PCI device | Edward O'Callaghan |
2020-08-28 | vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt soc | Jonathan Zhang |
2020-08-28 | soc/intel/tigerlake: add ddr4-spd-empty.hex | Aaron Durbin |
2020-08-28 | util: Add memory parts needed by zork boards | Rob Barnes |
2020-08-28 | util/gen_spd: translate DeviceBusWidth to die bus width | Nick Vaccaro |
2020-08-28 | util: rename lp4x spds to include "lp4x-" in name | Nick Vaccaro |
2020-08-28 | util: volteer/dedede: move generic SPDs to common location | Nick Vaccaro |
2020-08-27 | soc/intel/common: Include Elkhart Lake SA IDs | Tan, Lean Sheng |
2020-08-27 | soc/intel/common: Add Elkhart Lake B0 CPU ID | Tan, Lean Sheng |
2020-08-26 | soc/intel/tigerlake: Rename pch_init() code | Alexey Buyanov |
2020-08-25 | util: Add spd_tools to generate DDR4 SPDs for TGL boards | Nick Vaccaro |
2020-08-25 | soc/intel/jasperlake: Disable multiphase SI init | Ronak Kanabar |
2020-08-25 | soc/intel/jasperlake: Select PLATFORM_USES_FSP2_2 | Ronak Kanabar |
2020-08-24 | mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms | Shelley Chen |
2020-08-24 | soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_ops | Kane Chen |
2020-08-24 | soc/intel/tigerlake: Fix IPU and Vtd config | Ravi Sarawadi |
2020-08-24 | soc/intel/jasperlake: use UDK_202005_BINDING | Ronak Kanabar |
2020-08-24 | soc/intel/common: Add downgrade support for CSE Firmware | Sridhar Siricilla |
2020-08-23 | soc/intel/cnl: Configure FSP option PcieRpSlotImplemented | Nico Huber |
2020-08-21 | SMM: Validate more user-provided pointers | Patrick Rudolph |
2020-08-21 | soc/intel/tigerlake: Enable long cr50 ready pulses | Jes Klinke |
2020-08-21 | soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE | Harshit Sharma |
2020-08-20 | cse_lite: Move global reset after MRC writeback | Caveh Jalali |
2020-08-20 | soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS' | Elyes HAOUAS |
2020-08-18 | elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE | Aaron Durbin |