summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2020-06-30jasperlake: enable tcc_offset functionalitySumeet R Pawnikar
2020-06-30tigerlake: enable tcc_offset functionalitySumeet R Pawnikar
2020-06-30ACPI: Drop typedef global_nvs_tKyösti Mälkki
2020-06-30soc/intel/tigerlake: Add CpuReplacementCheck to chip optionsJamie Ryu
2020-06-30soc/intel/tigerlake: Avoid NULL pointer dereferenceJohn Zhao
2020-06-30src: Remove whitespaces before tabsElyes HAOUAS
2020-06-29soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_opsWilliam Wei
2020-06-28vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww24 release and adapt socJonathan Zhang
2020-06-28soc/intel/common: add TCC activation functionalitySumeet R Pawnikar
2020-06-28soc/xeon_sp/cpx: Define MSR PPIN related registersJohnny Lin
2020-06-27soc/intel/broadwell: Use common early SPI codeAngel Pons
2020-06-25soc/intel/cannonlake: Add PchPmPwrCycDur to chip optionsSridhar Siricilla
2020-06-25drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1Jonathan Zhang
2020-06-25soc/intel/xeon_sp: use edk2-stable202005 headersJonathan Zhang
2020-06-25soc/intel/xeon_sp/cpx: display UPDs and CPX-SP specific HOBsJonathan Zhang
2020-06-25soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE defineEdward O'Callaghan
2020-06-24soc/intel/tigerlake: Fix unresolved symbol CDW1 errorJohn Zhao
2020-06-24soc/intel/broadwell/adsp: Fix 8-bit write on PCI_INTERRUPT_LINE registerElyes HAOUAS
2020-06-24src: Report byte-sized access for GPE0Angel Pons
2020-06-24ACPI: Replace smm_setup_structures()Kyösti Mälkki
2020-06-24ACPI: Replace uses of CBMEM_ID_ACPI_GNVSKyösti Mälkki
2020-06-22soc/intel/tigerlake: Add CmdMirror option in chip.hDavid Wu
2020-06-22soc/intel/xeon_sp/cpx: rename xeon_sp_get_cpu_count()Jonathan Zhang
2020-06-22mb/google/volteer: Override power limits with SKU-specific limitsTim Wawrzynczak
2020-06-22soc/intel/xeon_sp/cpx: consider stack personalityJonathan Zhang
2020-06-22soc/intel/xeon_sp/cpx: update ACPI xSDTJonathan Zhang
2020-06-22soc/intel/jasperlake: add processor power limits control supportSumeet R Pawnikar
2020-06-22soc/intel/xeon_sp/cpx: Finalize PCU configurationJonathan Zhang
2020-06-22soc/intel/tigerlake: Update platform.asl to ASL2.0 syntaxV Sowmya
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-22cpu/x86/smm: Define APM_CNT_NOOP_SMIKyösti Mälkki
2020-06-22soc/intel/broadwell/systemagent.c: Fix typoAngel Pons
2020-06-20ACPI: Drop some HAVE_ACPI_RESUME preprocessor useKyösti Mälkki
2020-06-19soc/intel/tigerlake: Update TCSS for SW CM supportJohn Zhao
2020-06-19soc/intel/common/acpi: rename dptf.asl to dptf_common.asl fileSumeet R Pawnikar
2020-06-19tigerlake: add unique acpi device ids for dptfSumeet R Pawnikar
2020-06-19Kconfig: Escape variable to accommodate new Kconfig versionsPatrick Georgi
2020-06-18soc/intel,chromeos: Fix EC RO/RW status in GNVSKyösti Mälkki
2020-06-18soc/intel/tigerlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel/jasperlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel/cannonlake: Enable FSP-S compressionKarthikeyan Ramasubramanian
2020-06-18soc/intel: remove unused dptf.asl file and other definesSumeet R Pawnikar
2020-06-18soc/intel/common: make dptf acpi device ids configurableSumeet R Pawnikar
2020-06-18soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-17soc/soch/intel/tigerlake: Integrate PCIe hot-plug config UPDWonkyu Kim
2020-06-17soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimitPatrick Rudolph
2020-06-17soc/intel/cannonlake: Use table instead of switch-casePatrick Rudolph
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16sb/intel: Remove spurious HAVE_SMI_HANDLER testKyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-14soc/intel/xeon_sp/cpx: select CACHE_MRC_SETTINGSJonathan Zhang
2020-06-14soc/intel/tigerlake: enable CPU_INTEL_COMMONAlex Levin
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-14soc/intel/xeon_sp/cpx: configure FSP-M UPD parametersJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add cpu entries in ssdtJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: fix MADT ACPI tableJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add IIO stack resources to DSDTJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add NUMA ACPI tablesJonathan Zhang
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-12soc/intel/tigerlake: Add devicetree support to change PCH VR settingsVenkata Krishna Nimmagadda
2020-06-10soc/intel/common: Replace cse_bp and ME with cse_lite in all console logsSridhar Siricilla
2020-06-10soc/intel/cannonlake: Put braces around *else* branchPaul Menzel
2020-06-10soc/intel/skylake: Remove space after type castPaul Menzel
2020-06-10soc/intel/skylake: Use unit macros KiB and MiBPaul Menzel
2020-06-10soc/intel/tigerlake: Add Hot-Plug and PME event handlers for ThunderboltJohn Zhao
2020-06-10ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki
2020-06-09soc/intel/tigerlake: Set FSPS UPD ITbtConnectTopologyTimeoutInMsJohn Zhao
2020-06-09soc/intel/tigerlake: Increase heap sizeDuncan Laurie
2020-06-08spd/lp4x: Set manufacturer part name to blank (0x20)Furquan Shaikh
2020-06-07soc/intel/baytrail,braswell,broadwell,quark: Select COMMON_FADTKyösti Mälkki
2020-06-07soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntaxVenkata Krishna Nimmagadda
2020-06-07soc/intel/jasperlake: Add JSL PMC as 'hidden' PCI deviceTim Wawrzynczak
2020-06-07mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt()Kyösti Mälkki
2020-06-07acpi,soc/intel: Make soc/motherboard_fill_fadt() globalKyösti Mälkki
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-06-06src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-06soc/intel/tigerlake: Add CPU ID for TGL B0Jamie Ryu
2020-06-06lp4x: Add new memory parts and generate SPDsFurquan Shaikh
2020-06-06soc/intel/jasperlake: Generate LP4x SPD files using gen_spd.goFurquan Shaikh
2020-06-06soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.goFurquan Shaikh
2020-06-06arch/x86: Declare permanent_smi_handler()Kyösti Mälkki
2020-06-06soc,southbridge/intel: Control SMI related FADT entriesKyösti Mälkki
2020-06-06soc/intel/xeon_sp/cpx: set up cpusJonathan Zhang
2020-06-04soc/intel/xeon_sp/cpx: add chip operation and PCIe enumerationJonathan Zhang
2020-06-03soc/intel/quark/memmap: Add missing 'include <cpu/x86/mtrr.h>'Elyes HAOUAS
2020-06-03soc/intel/jasperlake: Update C-States infoRonak Kanabar
2020-06-03soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-06-03soc/tigerlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-06-03soc/intel/jasperlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS
2020-06-03soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITSTim Wawrzynczak
2020-06-03soc/intel/tigerlake: update elog to include CSME reset causesderek.huang
2020-06-02soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik
2020-06-02soc/intel/cannonlake: Add RP configuration settingsChristian Walter
2020-06-02soc/intel/jasperlake: Update camera_clock_ctl.asl to ASL2.0 syntaxV Sowmya
2020-06-02soc/intel/jasperlake: Update gpio_op.asl to ASL2.0 syntaxV Sowmya
2020-06-02soc/intel/jasperlake: Update pch_hda.asl to ASL2.0 syntaxV Sowmya