summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2014-10-28baytrail: handle MRC being an ELF fileAaron Durbin
2014-10-28baytrail: Configure MSR for 2-core and 4-core P-state configutationDuncan Laurie
2014-10-28baytrail: move cache-as-ram base address to 0xfe000000Aaron Durbin
2014-10-28baytrail: romstage: Add function to check SW WP status for vbootShawn Nematbakhsh
2014-10-22reg_script: default to n for ARCH_X86Isaac Christensen
2014-10-22cmos: Rename the CMOS related functions.Gabe Black
2014-10-22broadwell: Update Haswell and Broadwell E0 microcodeDuncan Laurie
2014-10-22broadwell: Update microcodeDuncan Laurie
2014-10-22broadwell: ACPI, romstage, and other updatesDuncan Laurie
2014-10-22broadwell: Update D0 microcode to FFFF000EDuncan Laurie
2014-10-22broadwell: Update microcode for supported CPUsDuncan Laurie
2014-10-22broadwell: add new intel SOCDuncan Laurie
2014-10-22baytrail: Move HDA verb table to Intel SOC common directoryDuncan Laurie
2014-10-22baytrail: Move MRC cache code to a common directoryDuncan Laurie
2014-10-22baytrail/rambi: S3 support and other updatesKein Yuan
2014-10-19x86 romstage: Move stack just below RAMTOPKyösti Mälkki
2014-10-19haswell baytrail: Enable RELOCATABLE_RAMSTAGEKyösti Mälkki
2014-10-14intel/fsp_baytrail: Add padding so device_nvs location matches ACPIScott Radcliffe
2014-10-14baytrail: Add padding to the end of device_nvs to match ACPIScott Radcliffe
2014-10-14intel/fsp_baytrail: Clear the GNVS area prior to fillingScott Radcliffe
2014-10-09intel/fsp_baytrail: Include header for "southcluster_smm_save_gpio_route"Kayalvizhi Dhandapani
2014-10-09intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module addedKayalvizhi Dhandapani
2014-10-09intel/fsp_baytrail: Fix SMM/SMIKayalvizhi Dhandapani
2014-10-01baytrail: update C0 microcodeShawn Nematbakhsh
2014-09-29intel/fsp_baytrail: Add S3 suspend/resume SupportMohan D'Costa
2014-09-24baytrail: add 80c microcode for C0 partsAaron Durbin
2014-09-19baytrail/rambi: spi, charger, and audio updatesAaron Durbin
2014-09-18rambi/baytrail: ACPI, GPIO, audio, misc updatesShawn Nematbakhsh
2014-08-28soc/intel/baytrail/Kconfig: Remove empty line at top filePaul Menzel
2014-08-15Move baytrail-specific config to baytrail.Vladimir Serbinenko
2014-08-11soc/intel/fsp_baytrail: set up for including irqroute.h twiceMartin Roth
2014-08-01fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1Martin Roth
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
2014-07-17soc,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-17soc,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-14SPI: Split writes using spi_crop_chunk()Kyösti Mälkki
2014-07-08soc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05spi: Change spi_xfer to work in units of bytes instead of bits.Gabe Black
2014-07-05spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.Gabe Black
2014-06-23baytrail_fsp: Fix the mmconf KconfigMartin Roth
2014-06-23fsp_baytrail: Minor Kconfig updatesMartin Roth
2014-06-21intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki
2014-06-18fsp_baytrail: Add the default FSP locationMartin Roth
2014-06-18fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcodeMartin Roth
2014-06-18ACPI: Remove CBMEM TOC from GNVSKyösti Mälkki
2014-06-13fsp_baytrail: remove version from default vbios pathMartin Roth
2014-06-13fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOTMartin Roth
2014-05-30cpu/intel/fsp_model_206ax: change realpath to readlinkMartin Roth
2014-05-29fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chipMartin Roth
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
2014-05-15baytrail: Add SOC thermal settingsDuncan Laurie
2014-05-15baytrail: Enable PCIe common clock and ASPMDuncan Laurie
2014-05-15baytrail: enable graphics turboAaron Durbin
2014-05-15baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPEDAaron Durbin
2014-05-15baytrail: Add ACPI Device for XHCIDuncan Laurie
2014-05-15baytrail: nvm: use proper types for checking eraseAaron Durbin
2014-05-15baytrail: mrc_cache: check region erased before erasingAaron Durbin
2014-05-13baytrail: add C0 microcode updateAaron Durbin
2014-05-13baytrail: reboot with EC in S0 with no MRC cache and EC in RWAaron Durbin
2014-05-13baytrail: dptf: Add disable trip point methodsDuncan Laurie
2014-05-13baytrail: Updates for DPTF ACPI frameworkDuncan Laurie
2014-05-13baytrail: don't SMI on tco timer firingAaron Durbin
2014-05-13baytrail: clear the pmc wake status registersAaron Durbin
2014-05-13baytrail: log reset, power, and wake events in elogAaron Durbin
2014-05-13baytrail: snapshot power state in romstageAaron Durbin
2014-05-13baytrail: add cpuid for C0Aaron Durbin
2014-05-12baytrail: align with intel recommendationsAaron Durbin
2014-05-12baytrail: add way to load reference code from vboot areaAaron Durbin
2014-05-12baytrail: Expose IOSF as ACPI objectDuncan Laurie
2014-05-12baytrail: Put devices in ACPI mode after setupDuncan Laurie
2014-05-12baytrail: Add header include wrapper and offset defineDuncan Laurie
2014-05-10baytrail: cache reference code for S3 resumeAaron Durbin
2014-05-10baytrail: allow ramstage_cache_location() usage in ramstageAaron Durbin
2014-05-10baytrail: note S3 resume status earlierAaron Durbin
2014-05-10baytrail: utilize reg_script_run_on_dev()Aaron Durbin
2014-05-10baytrail: initialize perf/power registersAaron Durbin
2014-05-10baytrail: add more iosf access functionsAaron Durbin
2014-05-10baytrail: remove verbosity in iosfAaron Durbin
2014-05-10baytrail: Add support for LPSS and SCC devices in ACPI modeDuncan Laurie
2014-05-09baytrail: Basic DPTF frameworkDuncan Laurie
2014-05-09baytrail: Enable panel and set timingsDuncan Laurie
2014-05-09baytrail: allow SD card controller capabilities overridesAaron Durbin
2014-05-09baytrail: fix nvs offsetsAaron Durbin
2014-05-09baytrail: lpe audio device needs memory for its firmwareAaron Durbin
2014-05-08baytrail: gpio: Make GPIO inputs MMIO by defaultShawn Nematbakhsh
2014-05-08baytrail: enable lpe resources assigned to deviceAaron Durbin
2014-05-08baytrail: Fix _CRS to build with new IASLDuncan Laurie
2014-05-08baytrail: add lpe codec clock configurationAaron Durbin
2014-05-08baytrail: Add ACPI code to describe GPIO controllerDuncan Laurie
2014-05-08baytrail: Update to microcode 31E and fix C-state tableDuncan Laurie
2014-05-07baytrail: minor stylePatrick Georgi
2014-05-07baytrail: romstage: Add config option to enable RMTShawn Nematbakhsh
2014-05-07baytrail: pcie: Root port initializationAaron Durbin
2014-05-07baytrail: gpio: Fix NCORE gpio-to-pad LUTShawn Nematbakhsh
2014-05-07baytrail: enable caching and prefetching in spi controllerAaron Durbin
2014-05-07baytrail: fix direct irq pad configurationAaron Durbin
2014-05-07baytrail: ensure init_chromeos() is called in romstageAaron Durbin
2014-05-07baytrail: don't allow PCIE wake upsAaron Durbin
2014-05-07baytrail: gpio: Make pad input/output state mutually exclusiveShawn Nematbakhsh
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-01 04:30:03 +0000