index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
gitea
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
soc
/
intel
Age
Commit message (
Expand
)
Author
2020-12-08
soc/intel/cannonlake: Restore alphabetical order of Kconfig selects
Felix Singer
2020-12-08
soc/intel/cannonlake: Align SATA mode names with soc/skl
Felix Singer
2020-12-08
soc/intel/skylake: Shorten SATA mode enum value names
Felix Singer
2020-12-08
soc/intel/skylake: Restore alphabetical order of Kconfig selects
Felix Singer
2020-12-08
commonlib/region: Allow multiple windows for xlate_region_dev
Furquan Shaikh
2020-12-08
soc/intel/common/gpio_defs: Add PAD_TRIG(OFF) in PAD_CFG_GPI_GPIO_DRIVER
Kaiyen Chang
2020-12-08
soc/intel/common/usb4: Add ADL-P DMA0/1 ID into USB4 common code
Subrata Banik
2020-12-08
soc/intel/common/block/cpu/car: Fix two whitespace issues
Subrata Banik
2020-12-07
soc/intel/skl: set PEG port state to auto
Michael Niewöhner
2020-12-07
sb/intel/common: Modify CONFIG_LOCK_MANAGEMENT_ENGINE behavior
Sridhar Siricilla
2020-12-07
common/block/cse: Rename cbfs_boot_load_file() to cbfs_load()
V Sowmya
2020-12-05
soc/intel/jasperlake: Add Acoustic noise mitigation configuration
Maulik V Vaghela
2020-12-05
soc/intel/xeon_sp: Don't use common block acpi.h
Marc Jones
2020-12-05
soc/intel/common/block/usb4: Add the PCI ID for ADL
V Sowmya
2020-12-04
soc/intel/alderlake: Align chipset.cb with pci_devs.h
Eric Lai
2020-12-04
src/soc/intel/alderlake: Enable the PCH HDA
V Sowmya
2020-12-04
soc/intel/{skl,cnl}: add NMI_{EN,STS} registers
Michael Niewöhner
2020-12-04
soc/intel/common/block/gpio: add code for NMI enabling
Michael Niewöhner
2020-12-04
intel/common/block/gpio: only reset configured SMI instead of all
Michael Niewöhner
2020-12-03
soc/intel/skylake: Add chipset devicetree
Felix Singer
2020-12-03
src: Remove redundant use of ACPI offset(0)
Elyes HAOUAS
2020-12-03
cbfs: Introduce cbfs_ro_map() and cbfs_ro_load()
Julius Werner
2020-12-02
cbfs: Simplify load/map API names, remove type arguments
Julius Werner
2020-12-02
cbfs: Enable CBFS mcache on most chipsets
Julius Werner
2020-12-02
soc/intel/common/cse: Perform cse_fw_sync on BS_PRE_DEVICE entry
Furquan Shaikh
2020-12-02
soc/intel/skylake: Fix compilation under x86_64
Patrick Rudolph
2020-12-02
soc/intel/elkhartlake: Update Kconfig
Tan, Lean Sheng
2020-12-02
soc/intel/skylake: Map VBIOS IDs
Paul Menzel
2020-12-01
soc/intel/common/block/smm/smihandler: Fix compilation under x86_64
Patrick Rudolph
2020-12-01
soc/intel/common/block/cpu/car/exit_car: Fix compilation on x86_64
Patrick Rudolph
2020-12-01
soc/intel/common/block/cpu/car/cache_as_ram: Add x86_64 support
Patrick Rudolph
2020-12-01
soc/intel/common/block/systemagent: Fix compilation on x86_64
Patrick Rudolph
2020-11-30
soc/intel/skylake: Fix comment
Felix Singer
2020-11-30
soc/intel/alderlake: Add initial chipset.cb
Tim Wawrzynczak
2020-11-30
soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices
Tim Wawrzynczak
2020-11-30
lp4x: Add new memory parts and generate SPDs
Nick Vaccaro
2020-11-29
soc/intel: Configure P2SB before other PCH controllers
Furquan Shaikh
2020-11-29
soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration
Sridhar Siricilla
2020-11-28
soc/intel/skl: correct OC pin skip value for disabled usb ports
Michael Niewöhner
2020-11-27
soc/intel/jasperlake: Enable VT-d and generate DMAR Table
Meera Ravindranath
2020-11-25
soc/intel/{broadwell,quark}: Drop `PEI_DATA` typedef
Angel Pons
2020-11-24
soc/intel/xeon_sp: Enable SMI handler
Rocky Phagura
2020-11-24
soc/intel/xeon_sp: Select INTEL_COMMON_BLOCK_TCO
Arthur Heymans
2020-11-24
soc/intel/xeon_sp: Hook up the PMC driver
Arthur Heymans
2020-11-24
soc/intel/skylake: Support NHLT 1ch DMIC
Benjamin Doron
2020-11-24
soc/intel/skylake: Use correct NHLT_PDM_DEV definition
Benjamin Doron
2020-11-23
soc/intel/cannonlake: Add ICC limits for CFL-S DT 4
Angel Pons
2020-11-23
soc/intel/denverton_ns: Hook up SMMSTORE
Angel Pons
2020-11-23
soc/intel/alderlake: Update UART0 GPIO as per latest schematics
Subrata Banik
2020-11-23
soc/intel/alderlake: Update DCACHE_BSP_STACK_SIZE and DCACHE_RAM_SIZE
Subrata Banik
2020-11-22
soc/intel/alderlake: Fix overlapping memory address used for early GSPI2 and ...
Bora Guvendik
2020-11-22
soc/intel/tigerlake: Fix overlapping memory address used for early GSPI2 and ...
Bora Guvendik
2020-11-22
soc/intel/xeon_sp: Work around FSP-T not respecting its own API
Arthur Heymans
2020-11-22
soc/intel/block/pmclib.c: Properly guard apm_control()
Arthur Heymans
2020-11-22
soc/intel/common/pmc.c Don't implement a weak function that dies
Arthur Heymans
2020-11-22
soc/intel/block/pmc: Only include the PCI driver when it is not hidden
Arthur Heymans
2020-11-22
soc/intel/block/pmc: Move pmc_set_acpi_mode() to pmc_lib.c
Arthur Heymans
2020-11-22
soc/intel/denverton_ns: Convert to ASL 2.0 syntax
Elyes HAOUAS
2020-11-22
soc/intel/braswell/bootblock/bootblock.c: Report the FSP-T output
Frans Hendriks
2020-11-20
soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBER
Arthur Heymans
2020-11-20
soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF
Arthur Heymans
2020-11-20
soc/intel/xeon_sp: Use common P2SB functions to generate HPET IOAPIC
Arthur Heymans
2020-11-20
soc/intel/apollolake: use P2SB function to generate DMAR IOAPIC
Arthur Heymans
2020-11-20
soc/intel/common/block/p2sb: Add ioapic BDF functions
Arthur Heymans
2020-11-20
soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMAR
Arthur Heymans
2020-11-20
soc/intel/apollolake: use P2SB function to generate DMAR HPET
Arthur Heymans
2020-11-20
soc/intel/common/block/p2sb: Add hpet BDF functions
Arthur Heymans
2020-11-20
soc/intel/common/p2sb: Add helper function to determine p2sb state
Arthur Heymans
2020-11-20
soc/intel/xeon_sp: Lock down DMICTL
Arthur Heymans
2020-11-20
soc/intel/xeon_sp/cpx: Lock down P2SB SBI
Arthur Heymans
2020-11-20
soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callback
Arthur Heymans
2020-11-20
soc/intel/denverton_ns: Initialize thermal configuration
Julien Viard de Galbert
2020-11-20
soc/intel/denverton_ns: Enable MC Exception
Julien Viard de Galbert
2020-11-20
src/soc/intel/denverton_ns: Use improvement in coreboot since 4.9
Julien Viard de Galbert
2020-11-20
soc/intel/common: Use per-soc definition for BAR sizes
Duncan Laurie
2020-11-20
soc/intel/common/block/cse: Clear post code before reset
Duncan Laurie
2020-11-20
soc/intel/tigerlake: Enable GPIO IOSTANDBY configuration
Duncan Laurie
2020-11-20
soc/intel/tigerlake: Expose UPD to enable Precision Time Measurement
Duncan Laurie
2020-11-20
soc/intel/tigerlake: Enable RTD3 driver and IPC mailbox
Duncan Laurie
2020-11-20
soc/intel/common: Add PCIe Runtime D3 driver for ACPI
Duncan Laurie
2020-11-20
soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD
Michael Niewöhner
2020-11-20
soc/intel/common/acpi: add _HID to PEPD
Michael Niewöhner
2020-11-20
soc/intel/common/acpi: correct return value for PEPD enum function
Michael Niewöhner
2020-11-20
soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards
Michael Niewöhner
2020-11-20
soc/intel/common/acpi: drop return value for disabled PEPD function 2
Michael Niewöhner
2020-11-20
soc/intel/common/acpi: rename PEPD/LPI macros for clarification
Michael Niewöhner
2020-11-19
soc/intel/common/acpi: rename LPID to PEPD
Michael Niewöhner
2020-11-19
soc/intel/common/acpi: move S0ix UUID to the condition
Michael Niewöhner
2020-11-19
soc/intel/common/acpi: drop the southridge scope around PEPD
Michael Niewöhner
2020-11-18
soc/intel/common: Move CSE RW into new FMAP region to optimize boot time
Sridhar Siricilla
2020-11-18
soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/B
V Sowmya
2020-11-18
soc/intel/common: Add Kconfig to enable the CSE FW Update feature
V Sowmya
2020-11-18
soc/intel/common: Add Kconfig for CSE RW firmware version
V Sowmya
2020-11-17
soc/intel/xeon_sp: Fix SKX SATA drive boot issue
Marc Jones
2020-11-17
src: Add missing 'include <console/console.h>'
Elyes HAOUAS
2020-11-16
src: Update some incorrect config options in comments
Martin Roth
2020-11-16
soc/intel/denverton_ns: Generate ACPI DMAR Table
Julien Viard de Galbert
2020-11-16
soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id's
Arthur Heymans
2020-11-16
soc/intel/broadwell/systemagent.c: Rename to `northbridge.c`
Angel Pons
2020-11-16
lp4x: Add new memory parts and generate SPDs
David Wu
[prev]
[next]