coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-12-19	arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE	Kyösti Mälkki
2019-12-19	{drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC	Wim Vervoorn
2019-12-19	soc/intel/tigerlake: Add required header files in pch.c	Aamir Bohra
2019-12-19	src: Remove unused 'include <arch/cpu.h>'	Elyes HAOUAS
2019-12-19	src/soc/intel: Remove unused <stdlib.h>	Elyes HAOUAS
2019-12-19	src: Use '#include <smp/node.h>' when appropriate	Elyes HAOUAS
2019-12-19	src: Remove unused include <device/smbus_def.h>	Elyes HAOUAS
2019-12-18	src: Remove unused 'include <bootblock_common.h>'	Elyes HAOUAS
2019-12-17	soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB	Wim Vervoorn
2019-12-17	soc/intel/skylake: Add irq 11 to the LNK* _PRS	Wim Vervoorn
2019-12-17	soc/intel/apollolake: add support for extracting LBP2 from IFWI	Jeremy Compostella
2019-12-17	soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range	Wim Vervoorn
2019-12-17	src: Conditionally include TEVT	Frans Hendriks
2019-12-16	src/soc/intel/cannonlake: Bump MAX_CPU from 8->12	Edward O'Callaghan
2019-12-16	soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake	Aamir Bohra
2019-12-16	3rdparty/fsp: Update to current master again	Nico Huber
2019-12-16	soc/intel/common/block/chip/Kconfig: Fix minor whitespace	Himanshu Sahdev aka CunningLearner
2019-12-16	soc/intel/tigerlake: Pick correct pmc base reg from pch type	Maulik V Vaghela
2019-12-14	Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID"	Nico Huber
2019-12-14	bootblock: Provide some common prototypes	Kyösti Mälkki
2019-12-13	soc/intel/common: Add PCI device IDs for CMP-H	Gaggery Tsai
2019-12-12	soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h	Furquan Shaikh
2019-12-11	printf: Automatically prefix %p with 0x	Julius Werner
2019-12-11	soc/intel/tigerlake: Include soc common lpss header file	Aamir Bohra
2019-12-11	soc/intel/tigerlake: add soc implementation for ETR address API	Aamir Bohra
2019-12-11	soc/intel/Kconfig: Load Tiger Lake SOC Kconfig	Aamir Bohra
2019-12-10	soc/intel/common: Add Jasperlake Device IDs	rkanabar
2019-12-10	include/device/pci_ids: Add Coffeelake U IGD P630	Christian Walter
2019-12-09	3rdparts/fsp: Update fsp submodule	Johanna Schander
2019-12-09	soc/intel/bsw/gpio: Factor out GPI macros	Angel Pons
2019-12-06	soc/intel/skylake: Add option to control microcode update inclusion	Wim Vervoorn
2019-12-05	soc/intel/braswell: Use common sb code for SPI lockdown configuration	Arthur Heymans
2019-12-03	src: Add missing include <stdlib.h>	Elyes HAOUAS
2019-12-03	soc/intel/cannonlake: Configure GPIO PM configuration in bootblock	Subrata Banik
2019-12-03	soc/intel/common/cse: Update comment for post-CAR global world	Patrick Georgi
2019-12-02	soc/intel/cannonlake: Add gfx.asl file	Mathew King
2019-12-02	soc/intel: Intel graphics driver scans generic bus	Mathew King
2019-12-02	soc/intel/cannonlake: Fix compilation	Praveen Hodagatta Pranesh
2019-12-02	soc/intel/tigerlake: Change compilation based on TIGERLAKE_BASE	Maulik V Vaghela
2019-12-02	src/soc/intel: Add Cometlake-S and CMP-H skus	Gaggery Tsai
2019-12-02	src/: Remove g_ prefixes and _g suffixes from variables	Patrick Georgi
2019-11-29	{northbridge,soc,southbridge}: Don't use both of _ADR and _HID	Elyes HAOUAS
2019-11-29	soc/intel/baytrail: Move to C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-11-29	soc/intel/braswell: Don't reinitialize SPI after lockdown	Arthur Heymans
2019-11-29	soc/intel/braswell: Use sb/intel/common/spi.c	Arthur Heymans
2019-11-28	soc/intel/tigerlake: select correct chipset based on soc Kconfig	Maulik V Vaghela
2019-11-28	pci_ids: Update Intel Lewisburg SMBUS PCI ID	Jonathan Zhang
2019-11-28	soc/intel/skl: Drop FSP_CAR remnants	Nico Huber
2019-11-27	soc/intel/skylake: Clean up report_cpu_info() function	Usha P
2019-11-27	soc/intel/cannonlake: Disable USB2 PHY Power gating	Surendranath Gurivireddy
2019-11-27	soc/intel/tigerlake: Fix smm_relocation_params	Kyösti Mälkki
2019-11-27	soc/intel/baytrail: Don't reinitialize SPI after lockdown	Arthur Heymans
2019-11-27	soc/intel/baytrail: Use sb/intel/common/spi.c	Arthur Heymans
2019-11-27	soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot	Angel Pons
2019-11-26	soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-T	Subrata Banik
2019-11-26	soc/intel/cannonlake: Add chip config to override CPU flex ratio	Subrata Banik
2019-11-26	sb/intel/common/spi: Add Baytrail/Braswell support	Arthur Heymans
2019-11-25	soc/intel/tigerlake: Add Jasperlake soc Kconfig	Maulik V Vaghela
2019-11-25	Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol	Arthur Heymans
2019-11-25	soc/intel/broadwell: Fix 'dead increment'	Elyes HAOUAS
2019-11-22	soc/intel/icelake: Make CpuMpPpi implementation default for ICL	Subrata Banik
2019-11-22	soc/intel/common/intelblocks: Define PAD_CFG0_MODE_NF7	Nick Vaccaro
2019-11-22	intel/smm: Provide common smm_relocation_params	Kyösti Mälkki
2019-11-22	soc/intel/skylake: Refactor pch_early_init() code	Usha P
2019-11-21	Kconfig: Remove not found sources	Elyes HAOUAS
2019-11-21	soc/intel/fsp_broadwell_de: Drop support	Arthur Heymans
2019-11-21	soc/intel/fsp_baytrail: Drop support	Arthur Heymans
2019-11-20	soc/intel/skylake: lockdown: lock global reset	Michael Niewöhner
2019-11-20	soc/intel/icelake: lockdown: lock global reset	Michael Niewöhner
2019-11-20	soc/intel/cannonlake: lockdown: lock global reset	Michael Niewöhner
2019-11-20	soc/intel/common: pmclib: make use of the new ETR address API	Michael Niewöhner
2019-11-20	soc/intel/skylake: add soc implementation for ETR address API	Michael Niewöhner
2019-11-20	cbfs: switch to region_device for location APIs	Aaron Durbin
2019-11-18	include: Make stdbool.h a separate file	Julius Werner
2019-11-18	*/Makefile: Always build enable_usbdebug.c	Arthur Heymans
2019-11-16	intel/skylake: Use new PCIe RP devicetree update	Nico Huber
2019-11-16	soc/intel: Implement PCIe RP devicetree update based on LCAP	Nico Huber
2019-11-15	soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined	Wim Vervoorn
2019-11-15	soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()	Subrata Banik
2019-11-15	soc/intel/common: Make alignment proper for comments	Subrata Banik
2019-11-14	soc/intel/tigerlake: Include few more Tigerlake device IDs	Subrata Banik
2019-11-14	cbfs: Stop checking master header	Julius Werner
2019-11-12	soc/intel/tigerlake: Remove FSP-T option in Kconfig	Arthur Heymans
2019-11-12	soc/intel/icelake: Remove FSP-T option in Kconfig	Arthur Heymans
2019-11-12	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans
2019-11-12	soc/intel/tigerlake: Remove deprecated CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_T...	Subrata Banik
2019-11-11	soc/{cannonlake,skylake}: Remove unused 'rdmsr(MSR_CONFIG_TDP_NOMINAL)'	Elyes HAOUAS
2019-11-11	drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driver	Michael Niewöhner
2019-11-11	soc/intel/denverton_ns: make use of common cbmem_top_chipset	Michael Niewöhner
2019-11-11	soc/intel/tigerlake: Fix cbmem_top	Arthur Heymans
2019-11-11	soc/intel/quark: make use of common cbmem_top_chipset	Michael Niewöhner
2019-11-11	soc/intel/apollolake: make use of common cbmem_top_chipset	Michael Niewöhner
2019-11-11	fsp{rangeley,baytrail,broadwell_de}: Fix dead assignment	Elyes HAOUAS
2019-11-11	soc/intel/icelake: add soc implementation for ETR address API	Michael Niewöhner
2019-11-11	soc/intel/cannonlake: add soc implementation for ETR address API	Michael Niewöhner
2019-11-11	soc/intel/apollolake: add soc implementation for ETR address API	Michael Niewöhner
2019-11-11	soc/intel/common: pmclib: add API to get ETR register address	Michael Niewöhner
2019-11-10	soc/intel/broadwell: Use common sb code for SPI lockdown configuration	Arthur Heymans
2019-11-10	soc/intel/broadwell: Don't reinitialize SPI after lockdown	Arthur Heymans
2019-11-10	soc/intel/broadwell: Use common INTEL_SB SPI code	Arthur Heymans