Age | Commit message (Expand) | Author |
2020-01-26 | soc/intel/skylake: Add _SEG/_UID name variables | Subrata Banik |
2020-01-26 | soc/intel/skylake: Only reserve TPM area for !CONFIG_TPM_CR50 device | Subrata Banik |
2020-01-25 | soc/intel/tigerlake: Add IPU in ACPI | Wonkyu Kim |
2020-01-25 | soc/intel/tigerlake: Configure ClkReq according to mainboard design | Wonkyu Kim |
2020-01-25 | soc/intel/tigerlake: Add GPIO helper function | Shaunak Saha |
2020-01-25 | soc/intel/tigerlake: Fix GPIO communities | Shaunak Saha |
2020-01-24 | soc/intel/skylake: Remove unused ICH memory reference | Subrata Banik |
2020-01-24 | soc/intel/skylake: Move pci_irqs.asl from SA to PCH | Subrata Banik |
2020-01-24 | soc/intel/tigerlake: Enable SATA | Wonkyu Kim |
2020-01-23 | soc/intel/common: Update SA bit fields as per EDS | Subrata Banik |
2020-01-22 | soc/intel/tigerlake: enable gpio dual route support | Nick Vaccaro |
2020-01-22 | soc/intel/tigerlake: Update fsp_params for TGL | Srinidhi N Kaushik |
2020-01-22 | soc/intel/tigerlake: Update GPIO config | Ravi Sarawadi |
2020-01-22 | soc/intel/common: Add Elkhartlake Device IDs | Tan, Lean Sheng |
2020-01-22 | soc/intel/tigerlake: Update interrupt info | Wonkyu Kim |
2020-01-18 | soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs | Gaggery Tsai |
2020-01-18 | soc/intel/cannonlake: Add chip config for SATA strength | Jamie Chen |
2020-01-18 | soc/intel/tigerlake: Update ACPI files | Ravi Sarawadi |
2020-01-18 | soc/intel/tigerlake: Update pci dev definition | Wonkyu Kim |
2020-01-18 | soc/intel/common: Fix typos | Sridhar Siricilla |
2020-01-18 | soc/intel/common/cse: Add description for macros | Sridhar Siricilla |
2020-01-18 | soc/intel/tigerlake: Update chip files | Ravi Sarawadi |
2020-01-18 | soc/intel/common/cse: Add consistent HECI command id/group id naming | Sridhar Siricilla |
2020-01-18 | soc/intel/{skylake,common}/acpi/dptf/thermal.asl: Prevent iasl remarks | Wim Vervoorn |
2020-01-18 | intel/apollolake: Remove CBFS locator override | Julius Werner |
2020-01-16 | soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC sp... | Subrata Banik |
2020-01-15 | soc/intel/common/block/fast_spi: don't include all spi flash drivers | Aaron Durbin |
2020-01-15 | drives/spi/spi_flash: add option to not select all drivers | Aaron Durbin |
2020-01-15 | soc/intel/tigerlake: Update header files | Ravi Sarawadi |
2020-01-14 | sb/intel/common: Declare common smbus_base() and enable_smbus() | Kyösti Mälkki |
2020-01-14 | soc/intel/baytrail: Add SOUTHBRIDGE_INTEL_COMMON_SMBUS | Kyösti Mälkki |
2020-01-14 | soc/intel/cannonlake: Fix ASL compilation remarks | Subrata Banik |
2020-01-13 | soc/intel/tigerlake: Select correct fsp_param as per SoC Kconfig | Maulik V Vaghela |
2020-01-12 | soc/intel: Fix ACPI device operations initialization | Karthikeyan Ramasubramanian |
2020-01-10 | {Documentation,soc/intel}: Fix typo | Elyes HAOUAS |
2020-01-10 | soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper | Subrata Banik |
2020-01-09 | sb/intel/common: Add smbus_set_slave_addr() | Kyösti Mälkki |
2020-01-09 | device,sb/intel: Move SMBus host controller prototypes | Kyösti Mälkki |
2020-01-09 | soc/intel/common: Drop old forked version of SMBUS support | Kyösti Mälkki |
2020-01-09 | soc/intel/broadwell: Drop old forked version of SMBUS support | Kyösti Mälkki |
2020-01-09 | soc/intel/common: Remove extra call layer | Kyösti Mälkki |
2020-01-09 | lib/spd_bin,soc/intel/common: Move get_spd_smbus() | Kyösti Mälkki |
2020-01-09 | soc/intel/common: Sync early SMBUS prototypes | Kyösti Mälkki |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2020-01-09 | soc/intel/tigerlake: Update Kconfig | Ravi Sarawadi |
2020-01-09 | soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpi | Subrata Banik |
2020-01-08 | soc/intel/tigerlake: Fix PMC config | Ravi Sarawadi |
2020-01-08 | soc/intel/cannonlake: Add VR config for CML | Jamie Chen |
2020-01-08 | soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device ID | Jamie Chen |
2020-01-07 | soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL code | Subrata Banik |
2020-01-06 | soc/intel/cannonlake: Add VR config for CFL, CNL and WHL | Patrick Rudolph |
2020-01-06 | soc/intel/dnv: Remove commented out Kconfig option | Subrata Banik |
2020-01-03 | device/early_smbus: Drop unused function parameter | Kyösti Mälkki |
2020-01-03 | soc/intel/common: Split some SMBUS support file | Kyösti Mälkki |
2020-01-03 | intel/braswell: Drop use of <device/early_smbus.h> | Kyösti Mälkki |
2020-01-02 | soc/intel/bsw/gpio.h: Drop unused values | Angel Pons |
2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
2019-12-31 | soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADT | Meera Ravindranath |
2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
2019-12-26 | soc/broadwell/minihd: correct vendor, subsystem IDs | Matt DeVillier |
2019-12-26 | soc/intel/cannonlake: Move GPIO PM configuration to soc level | Eric Lai |
2019-12-26 | src: Remove unused include <string.h> | Elyes HAOUAS |
2019-12-26 | soc/intel/cannonlake: Clean up report_cpu_info() function | Usha P |
2019-12-26 | soc/intel/cannonlake: Refactor pch_early_init() code | Usha P |
2019-12-26 | soc/intel/skylake: Rename pch_init() code | Usha P |
2019-12-25 | soc/intel/skylake/vr_config: Use lookup table by default | Patrick Rudolph |
2019-12-20 | soc/intel/tigerlake: Update FSP stack and heap size | Maulik V Vaghela |
2019-12-20 | {drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC | Wim Vervoorn |
2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE | Kyösti Mälkki |
2019-12-19 | {drivers,soc}/intel/fsp2_0: Move chipset specific logo handling to SoC | Wim Vervoorn |
2019-12-19 | soc/intel/tigerlake: Add required header files in pch.c | Aamir Bohra |
2019-12-19 | src: Remove unused 'include <arch/cpu.h>' | Elyes HAOUAS |
2019-12-19 | src/soc/intel: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-19 | src: Use '#include <smp/node.h>' when appropriate | Elyes HAOUAS |
2019-12-19 | src: Remove unused include <device/smbus_def.h> | Elyes HAOUAS |
2019-12-18 | src: Remove unused 'include <bootblock_common.h>' | Elyes HAOUAS |
2019-12-17 | soc/intel/skylake: Change SA_PCIEX_LENGTH to 256MB | Wim Vervoorn |
2019-12-17 | soc/intel/skylake: Add irq 11 to the LNK* _PRS | Wim Vervoorn |
2019-12-17 | soc/intel/apollolake: add support for extracting LBP2 from IFWI | Jeremy Compostella |
2019-12-17 | soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range | Wim Vervoorn |
2019-12-17 | src: Conditionally include TEVT | Frans Hendriks |
2019-12-16 | src/soc/intel/cannonlake: Bump MAX_CPU from 8->12 | Edward O'Callaghan |
2019-12-16 | soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake | Aamir Bohra |
2019-12-16 | 3rdparty/fsp: Update to current master again | Nico Huber |
2019-12-16 | soc/intel/common/block/chip/Kconfig: Fix minor whitespace | Himanshu Sahdev aka CunningLearner |
2019-12-16 | soc/intel/tigerlake: Pick correct pmc base reg from pch type | Maulik V Vaghela |
2019-12-14 | Revert "{northbridge,soc,southbridge}: Don't use both of _ADR and _HID" | Nico Huber |
2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
2019-12-13 | soc/intel/common: Add PCI device IDs for CMP-H | Gaggery Tsai |
2019-12-12 | soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h | Furquan Shaikh |
2019-12-11 | printf: Automatically prefix %p with 0x | Julius Werner |
2019-12-11 | soc/intel/tigerlake: Include soc common lpss header file | Aamir Bohra |
2019-12-11 | soc/intel/tigerlake: add soc implementation for ETR address API | Aamir Bohra |
2019-12-11 | soc/intel/Kconfig: Load Tiger Lake SOC Kconfig | Aamir Bohra |
2019-12-10 | soc/intel/common: Add Jasperlake Device IDs | rkanabar |
2019-12-10 | include/device/pci_ids: Add Coffeelake U IGD P630 | Christian Walter |
2019-12-09 | 3rdparts/fsp: Update fsp submodule | Johanna Schander |
2019-12-09 | soc/intel/bsw/gpio: Factor out GPI macros | Angel Pons |
2019-12-06 | soc/intel/skylake: Add option to control microcode update inclusion | Wim Vervoorn |