coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2016-01-29	soc/braswell: Fix Global NVS base address	Hannah Williams
2016-01-29	src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files	Martin Roth
2016-01-29	intel/skylake: Implement native Cache-as-RAM (CAR)	Subrata Banik
2016-01-28	soc/braswell: Add interface to program USB2_COMPBG register	shkim
2016-01-28	soc/braswell/acpi/DPTF: Write TCHG state on AC connect.	Jenny TC
2016-01-28	soc/braswell/acpi: Fix CID1 offset in comment	Hannah Williams
2016-01-28	soc/braswell: Fix issues found during static code analysis	Ravi Sarawadi
2016-01-28	Braswell: Separate L1 Sub State init procedure for boards.	Kenji Chen
2016-01-28	Strago: Enable CA Mirror	Shobhit Srivastava
2016-01-28	soc/braswell: Disable SD card detect simulation in FSP	Divya Sasidharan
2016-01-28	soc/braswell: Set max frequency to be turbo frequency	Hannah Williams
2016-01-28	soc/braswell: Fix DSP clock	fdurairx
2016-01-28	drivers/intel/fsp1_1: Remove extra include references	Lee Leahy
2016-01-27	soc/braswell: Fix leakage on V1P8S rail	Shobhit Srivastava
2016-01-27	soc/braswell: Add macro NATIVE_INT_PU20K	Hannah Williams
2016-01-26	Braswell: Implement Gpio library functions to read RAMID	Subrata Banik
2016-01-22	soc/braswell: Add method for Wifi regulatory domain	Felix Durairaj
2016-01-22	intel/skylake: Fix klockwork violation	Naresh G Solanki
2016-01-22	intel/skylake: Thermal Design Power PL1 and PL2 Config Changes	pchandri
2016-01-21	intel/skylake: remove third paragraph of license header	Martin Roth
2016-01-21	broadwell: gpio.asl: Make GWAK method serialized	Duncan Laurie
2016-01-19	Braswell: add code to support customization of I2C data hold time	Kane Chen
2016-01-19	intel/skylake: Fix issues found by klockwork	Naresh G Solanki
2016-01-19	intel/skylake: Adding provision to set voltages to the I2C ports	Naresh G Solanki
2016-01-19	intel/skylake: Disable SaGv in recovery mode	haridhar
2016-01-19	soc/braswell: Remove the unneccessary functions from pcie.c	Shaunak Saha
2016-01-19	intel/skylake: Add support for IV feedback loop capture blob	Sathya Prakash M R
2016-01-18	intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit	Barnali Sarkar
2016-01-18	intel/skylake: Remove unused devicetree configuration variables	Duncan Laurie
2016-01-18	intel/skylake: provide default VR configuration	Aaron Durbin
2016-01-18	intel/skylake: Add devicetree setting for DDR frequency limit UPD	Duncan Laurie
2016-01-18	intel/skylake: Add elog event for THERMTRIP	Duncan Laurie
2016-01-17	intel/skylake: disable heci1 if psf is unlocked	Archana Patni
2016-01-17	intel/skylake: During RO mode after FSP reset CB lose original state	Subrata Banik
2016-01-16	intel/skylake: Fix uninitialized variable warning	Martin Roth
2016-01-16	intel/skylake: Add kconfig option to skip Native SD Controller	Subrata Banik
2016-01-16	intel/skylake: Add VrConfig UPD parameters from coreboot	Rizwan Qureshi
2016-01-16	intel/skylake: Enable SkipMpInit token	Rizwan Qureshi
2016-01-15	intel/skylake: Init variable so GCC knows it's set	Martin Roth
2016-01-15	intel/skylake: More UPD params are added for PCH policy in FSP	Rizwan Qureshi
2016-01-15	intel/skylake: Update UPD parameters as per FSP 1.8.0	Barnali Sarkar
2016-01-15	intel/skylake: Add GPIO ACPI Apis.	Subrata Banik
2016-01-15	intel/skylake: add nhlt support	Aaron Durbin
2016-01-14	soc/braswell: Add CPUID for D0 stepping	Divya Sasidharan
2016-01-14	soc/braswell: Fix P-state table	Subrata Banik
2016-01-14	intel/skylake/pcr.c: error out on invalid size in pcr read/write	Martin Roth
2016-01-13	tree: drop last paragraph of GPL copyright header from new files	Martin Roth
2016-01-12	intel/skylake: Remove check for Microcode loaded by ME	Martin Roth
2016-01-08	fsp_baytrail: Add additional PCI space above 4GB	Martin Roth
2016-01-07	intel/braswell: Disable IFD & ME by default so abuild can build	Martin Roth
2016-01-07	Correct some common spelling mistakes	Martin Roth
2016-01-06	intel/braswell: Build in both C0 and 'other' vbios	Martin Roth
2015-12-27	soc/intel/broadwell: Add back support for EHCI debug setup	Duncan Laurie
2015-12-27	broadwell: Fix SATA Gen3 DTLE configuration registers	Duncan Laurie
2015-12-27	broadwell: Fix CONFIG_SPI_CONSOLE usage	Duncan Laurie
2015-12-26	ACPI: Add hack to avoid IASL warning when reading back registers	Martin Roth
2015-12-22	soc/intel/fsp_baytrail: Make sure i2c bus is < 7	Martin Roth
2015-12-20	soc/intel/broadwell: Init var before use, only use when needed	Martin Roth
2015-12-17	soc/intel/fsp_baytrail: Adjust root port INT routing	Martin Roth
2015-12-16	intel/fsp_baytrail: change indent to use tabs	Ben Gardner
2015-12-16	intel/fsp_baytrail: rename include folder baytrail to include/soc	Ben Gardner
2015-12-16	intel/fsp_baytrail: Fix PCI_DEV_PIRQ_ROUTE macro ending	Ben Gardner
2015-12-16	intel/skylake: Work around ROMCC optimization bug	Stefan Reinauer
2015-12-15	x86 acpi: remove ALIGN_CURRENT macro	Aaron Durbin
2015-12-11	mrc_cache: add version field	Aaron Durbin
2015-12-10	ACPI: Fix IASL Warning about unused method for GBUF check	Martin Roth
2015-12-10	intel/fsp_baytrail: Remove code for nonexistant BBAR	Ben Gardner
2015-12-10	lib: remove assets infrastructure	Aaron Durbin
2015-12-08	soc/intel/common: Remove USE_FMAP - symbol doesn't exist	Martin Roth
2015-12-08	soc/intel/skylake: Remove obsolete Kconfig symbols	Martin Roth
2015-12-06	fsp_baytrail: Add missing newline to eMMC Mode log	Ben Gardner
2015-12-06	Remove #ifdef checks on Kconfig symbols	Martin Roth
2015-12-04	braswell/skylake: Add FspUpdVpd.h to fix compilation	Stefan Reinauer
2015-12-03	intel/skylake: Add ACPI device for audio controller	Duncan Laurie
2015-12-03	intel/skylake: Remove unused code to add SSDT2	Duncan Laurie
2015-11-30	fsp_baytrail: Remove use of BAYTRAIL_SMM Kconfig symbol	Martin Roth
2015-11-28	baytrail: fix missing brackets around ir_base to fix IRQ routing	Alexander Couzens
2015-11-27	soc/intel/common: Fix whitespace in Kconfig	Martin Roth
2015-11-24	intel/soc/baytrail: Move MCRS ResourceTemplate out of _CRS method	Martin Roth
2015-11-24	soc/intel/braswell: Drop gfx_read_resources()	Nico Huber
2015-11-21	baytrail: add C0 and D0 stepping decode	Ben Gardner
2015-11-20	intel/skylake: Fix flash_controller.c compilation	Stefan Reinauer
2015-11-20	intel: Add MMA feature in coreboot	Pratik Prajapati
2015-11-20	fsp1_0: Remove hardcoded microcode locations	Martin Roth
2015-11-17	fsp_baytrail: use external microcode .h files	Martin Roth
2015-11-16	intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus	York Yang
2015-11-16	intel/fsp_baytrail: Load BSP microcode in bootblock	York Yang
2015-11-13	intel/skylake: ensure the RTC time is set	Aaron Durbin
2015-11-11	fsp_baytrail: Add macros for legacy GPIO output set up	Werner Zeh
2015-11-09	fsp_baytrail: Add functions to set a GPIO	Werner Zeh
2015-11-05	Kconfig: Remove obsolete Kconfig symbols from google/intel boards	Martin Roth
2015-11-05	intel/skylake: Add Fan control support	Sumeet Pawnikar
2015-11-05	skylake: Set Pkg Power clamping bit in Power Limit MSR	Rizwan Qureshi
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-28	intel/skylake: Add USB2 port config for max settings	Duncan Laurie
2015-10-27	intel/skylake: Clean up USB configuration in devicetree	Duncan Laurie
2015-10-27	FSP1_1: Always use common code	Lee Leahy
2015-10-27	FSP 1.1: Replace soc_ prefix with fsp_	Lee Leahy
2015-10-27	FSP 1.1: Move common FSP code	Lee Leahy
2015-10-27	intel/kunimitsu FAB3: Configure LPC to Quiet Mode.	pchandri