| Age | Commit message (Expand) | Author |
|---|
| 2014-12-05 | fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro | Martin Roth |
| 2014-12-05 | fsp_baytrail: update for UPD_SPD_CHECK macro | Martin Roth |
| 2014-12-05 | fsp_baytrail: update to add the UPD_DEFAULT_CHECK macro | Martin Roth |
| 2014-12-02 | Replace hlt with halt() | Patrick Georgi |
| 2014-12-01 | Mark non-executable files non-executable | Patrick Georgi |
| 2014-11-30 | Replace hlt() loops with halt() | Patrick Georgi |
| 2014-11-28 | ACPI: Remove CBMEM TOC from GNVS | Kyösti Mälkki |
| 2014-11-25 | intel: Remove IRQ1 from possible PIRQ assignemnt. | Vladimir Serbinenko |
| 2014-11-24 | intel/fsp_baytrail: add new CPUID for Baytrail I step D0 | Herve ELter |
| 2014-11-21 | intel/fsp_baytrail: add Gold3 FSP support | York Yang |
| 2014-11-20 | Replace includes of build.h with version.h | Kyösti Mälkki |
| 2014-11-19 | broadwell: move to per-device ACPI. | Vladimir Serbinenko |
| 2014-11-19 | fsp_baytrail: Fix ACPI 'Object is not referenced' warnings | Martin Roth |
| 2014-11-19 | fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.h | Martin Roth |
| 2014-11-18 | baytrail: fix range check | Patrick Georgi |
| 2014-11-13 | intel: use crosscompiler readelf, instead of global | Patrick Georgi |
| 2014-11-09 | src: Too many terminators ';;' at end of stmts, stop Skynet | Edward O'Callaghan |
| 2014-11-08 | intel: Use 'FORCEWAKE_ACK_HSW' define over '0x130044' | Edward O'Callaghan |
| 2014-11-04 | Redundant addr '&' operator on func ptr's in struct initiator | Edward O'Callaghan |
| 2014-11-01 | {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol | Edward O'Callaghan |
| 2014-10-28 | baytrail: Remove unused devicetree fields | Shawn Nematbakhsh |
| 2014-10-28 | baytrail: gfx: Don't configure hotplug + backlight registers | Shawn Nematbakhsh |
| 2014-10-28 | Baytrail/dptf: Always return 0 in TCPU._PPC | Kein Yuan |
| 2014-10-28 | baytrail: handle MRC being an ELF file | Aaron Durbin |
| 2014-10-28 | baytrail: Configure MSR for 2-core and 4-core P-state configutation | Duncan Laurie |
| 2014-10-28 | baytrail: move cache-as-ram base address to 0xfe000000 | Aaron Durbin |
| 2014-10-28 | baytrail: romstage: Add function to check SW WP status for vboot | Shawn Nematbakhsh |
| 2014-10-22 | reg_script: default to n for ARCH_X86 | Isaac Christensen |
| 2014-10-22 | cmos: Rename the CMOS related functions. | Gabe Black |
| 2014-10-22 | broadwell: Update Haswell and Broadwell E0 microcode | Duncan Laurie |
| 2014-10-22 | broadwell: Update microcode | Duncan Laurie |
| 2014-10-22 | broadwell: ACPI, romstage, and other updates | Duncan Laurie |
| 2014-10-22 | broadwell: Update D0 microcode to FFFF000E | Duncan Laurie |
| 2014-10-22 | broadwell: Update microcode for supported CPUs | Duncan Laurie |
| 2014-10-22 | broadwell: add new intel SOC | Duncan Laurie |
| 2014-10-22 | baytrail: Move HDA verb table to Intel SOC common directory | Duncan Laurie |
| 2014-10-22 | baytrail: Move MRC cache code to a common directory | Duncan Laurie |
| 2014-10-22 | baytrail/rambi: S3 support and other updates | Kein Yuan |
| 2014-10-19 | x86 romstage: Move stack just below RAMTOP | Kyösti Mälkki |
| 2014-10-19 | haswell baytrail: Enable RELOCATABLE_RAMSTAGE | Kyösti Mälkki |
| 2014-10-14 | intel/fsp_baytrail: Add padding so device_nvs location matches ACPI | Scott Radcliffe |
| 2014-10-14 | baytrail: Add padding to the end of device_nvs to match ACPI | Scott Radcliffe |
| 2014-10-14 | intel/fsp_baytrail: Clear the GNVS area prior to filling | Scott Radcliffe |
| 2014-10-09 | intel/fsp_baytrail: Include header for "southcluster_smm_save_gpio_route" | Kayalvizhi Dhandapani |
| 2014-10-09 | intel/fsp_baytrail: fix error "unknown type device_t", when SMM Module added | Kayalvizhi Dhandapani |
| 2014-10-09 | intel/fsp_baytrail: Fix SMM/SMI | Kayalvizhi Dhandapani |
| 2014-10-01 | baytrail: update C0 microcode | Shawn Nematbakhsh |
| 2014-09-29 | intel/fsp_baytrail: Add S3 suspend/resume Support | Mohan D'Costa |
| 2014-09-24 | baytrail: add 80c microcode for C0 parts | Aaron Durbin |
| 2014-09-19 | baytrail/rambi: spi, charger, and audio updates | Aaron Durbin |
| 2014-09-18 | rambi/baytrail: ACPI, GPIO, audio, misc updates | Shawn Nematbakhsh |
| 2014-08-28 | soc/intel/baytrail/Kconfig: Remove empty line at top file | Paul Menzel |
| 2014-08-15 | Move baytrail-specific config to baytrail. | Vladimir Serbinenko |
| 2014-08-11 | soc/intel/fsp_baytrail: set up for including irqroute.h twice | Martin Roth |
| 2014-08-01 | fsp_baytrail/.../gpio.h: Add GPIO_NC1 for GPIOS on func 1 | Martin Roth |
| 2014-07-23 | src/.../Kconfig: various small fixes to texts | Daniele Forsi |
| 2014-07-17 | soc,Makefile.inc: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2014-07-17 | soc,ASL: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2014-07-14 | SPI: Split writes using spi_crop_chunk() | Kyösti Mälkki |
| 2014-07-08 | soc: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
| 2014-07-05 | spi: Change spi_xfer to work in units of bytes instead of bits. | Gabe Black |
| 2014-07-05 | spi: Remove unused parameters from spi_flash_probe and setup_spi_slave. | Gabe Black |
| 2014-06-23 | baytrail_fsp: Fix the mmconf Kconfig | Martin Roth |
| 2014-06-23 | fsp_baytrail: Minor Kconfig updates | Martin Roth |
| 2014-06-21 | intel boards: Use acpi_is_wakeup_s3() | Kyösti Mälkki |
| 2014-06-18 | fsp_baytrail: Add the default FSP location | Martin Roth |
| 2014-06-18 | fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcode | Martin Roth |
| 2014-06-18 | ACPI: Remove CBMEM TOC from GNVS | Kyösti Mälkki |
| 2014-06-13 | fsp_baytrail: remove version from default vbios path | Martin Roth |
| 2014-06-13 | fsp_baytrail: Fix CONFIG_ENABLE_FSP_FAST_BOOT | Martin Roth |
| 2014-05-30 | cpu/intel/fsp_model_206ax: change realpath to readlink | Martin Roth |
| 2014-05-29 | fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip | Martin Roth |
| 2014-05-17 | build: separate CPPFLAGS from CFLAGS | Patrick Georgi |
| 2014-05-17 | build: CPPFLAGS is more common than INCLUDES | Patrick Georgi |
| 2014-05-15 | baytrail: Add SOC thermal settings | Duncan Laurie |
| 2014-05-15 | baytrail: Enable PCIe common clock and ASPM | Duncan Laurie |
| 2014-05-15 | baytrail: enable graphics turbo | Aaron Durbin |
| 2014-05-15 | baytrail: use CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED | Aaron Durbin |
| 2014-05-15 | baytrail: Add ACPI Device for XHCI | Duncan Laurie |
| 2014-05-15 | baytrail: nvm: use proper types for checking erase | Aaron Durbin |
| 2014-05-15 | baytrail: mrc_cache: check region erased before erasing | Aaron Durbin |
| 2014-05-13 | baytrail: add C0 microcode update | Aaron Durbin |
| 2014-05-13 | baytrail: reboot with EC in S0 with no MRC cache and EC in RW | Aaron Durbin |
| 2014-05-13 | baytrail: dptf: Add disable trip point methods | Duncan Laurie |
| 2014-05-13 | baytrail: Updates for DPTF ACPI framework | Duncan Laurie |
| 2014-05-13 | baytrail: don't SMI on tco timer firing | Aaron Durbin |
| 2014-05-13 | baytrail: clear the pmc wake status registers | Aaron Durbin |
| 2014-05-13 | baytrail: log reset, power, and wake events in elog | Aaron Durbin |
| 2014-05-13 | baytrail: snapshot power state in romstage | Aaron Durbin |
| 2014-05-13 | baytrail: add cpuid for C0 | Aaron Durbin |
| 2014-05-12 | baytrail: align with intel recommendations | Aaron Durbin |
| 2014-05-12 | baytrail: add way to load reference code from vboot area | Aaron Durbin |
| 2014-05-12 | baytrail: Expose IOSF as ACPI object | Duncan Laurie |
| 2014-05-12 | baytrail: Put devices in ACPI mode after setup | Duncan Laurie |
| 2014-05-12 | baytrail: Add header include wrapper and offset define | Duncan Laurie |
| 2014-05-10 | baytrail: cache reference code for S3 resume | Aaron Durbin |
| 2014-05-10 | baytrail: allow ramstage_cache_location() usage in ramstage | Aaron Durbin |
| 2014-05-10 | baytrail: note S3 resume status earlier | Aaron Durbin |
| 2014-05-10 | baytrail: utilize reg_script_run_on_dev() | Aaron Durbin |
| 2014-05-10 | baytrail: initialize perf/power registers | Aaron Durbin |
