Age | Commit message (Expand) | Author |
2019-10-07 | device: Rename scan_static_bus() -> enable_static_devices() | Nico Huber |
2019-10-06 | intel/fsp_broadwell_de: Rename from xx_DEV_FUNC | Kyösti Mälkki |
2019-10-05 | soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs | Patrick Rudolph |
2019-10-05 | intel/fsp_baytrail: Define PCH_DEV_SLOT_I2C1 | Kyösti Mälkki |
2019-10-05 | intel/fsp_baytrail: Rename from xx_DEV_FUNC | Kyösti Mälkki |
2019-10-04 | soc/skl/vr_config: fix KBL-U GT3 detection bug | Maxim Polyakov |
2019-10-04 | soc/skl/vr_config: fix GT Loadline for KBL-U/GT3 | Maxim Polyakov |
2019-10-04 | src/pci_ids: add missing Intel Kaby Lake iGPU PCIIDs | Maxim Polyakov |
2019-10-04 | src/pci_ids: add missing Intel Skylake iGPU PCIIDs | Maxim Polyakov |
2019-10-04 | soc/skl/vr_config: set Iccmax_gt depends on CPU/GT | Maxim Polyakov |
2019-10-03 | soc/intel/braswell/chip.h: Add IGD_MEMSIZE_xxMB | Frans Hendriks |
2019-10-03 | intel/fsp_baytrail: Drop some PCI scratchpad register definitions | Kyösti Mälkki |
2019-10-02 | intel/quark: Drop xx_DEV_FUNC | Kyösti Mälkki |
2019-10-02 | intel/skylake: Refactor IRQ assignments | Kyösti Mälkki |
2019-10-02 | intel/pci_devs: Regroup PCI xx_DEVID entries | Kyösti Mälkki |
2019-10-02 | intel/baytrail: Replace config_of(dev) with config_of_soc() | Kyösti Mälkki |
2019-10-02 | soc/intel: Replace config_of_path() with config_of_soc() | Kyösti Mälkki |
2019-10-02 | soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameter | Michael Niewöhner |
2019-10-01 | intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL | Kyösti Mälkki |
2019-09-30 | soc/intel/fsp_broadwell_de: Enable SSE and SSE2 | Kyösti Mälkki |
2019-09-30 | pci_ids: rename PCI_DEVICE_ID_INTEL_SKL_ID_H | Maxim Polyakov |
2019-09-30 | soc/intel/skylake: Fix ACPI exception AE_NOT_FOUND | Patrick Rudolph |
2019-09-30 | soc/intel/fsp_baytrail: Drop some __BOOTBLOCK__ guards | Kyösti Mälkki |
2019-09-30 | fsp_broadwell_de: Enable early write access to the SPI flash | Werner Zeh |
2019-09-29 | intel/fsp_baytrail: Drop unnecessary lookup for PCI 0:0.0 | Kyösti Mälkki |
2019-09-29 | soc/intel: Rename <intelblocks/chip.h> | Kyösti Mälkki |
2019-09-26 | soc/intel/fsp_broadwell_de: move get_busno1() into vtd.c | Andrey Petrov |
2019-09-25 | soc/intel/(apl,skl,cnl,common): Move mkhi_hdr structure definition to common | Sridhar Siricilla |
2019-09-24 | soc/fsp_broadwell_de: Add devhide functionality | Andrey Petrov |
2019-09-22 | soc/intel/skylake: lock down TCO on pch finalize | Michael Niewöhner |
2019-09-21 | soc/fsp_broadwell_de: Move function to get CPUBUSNO(1) into common file | Andrey Petrov |
2019-09-21 | soc/fsp_broadwell_de: Use DIMM numbers relative to channel | Andrey Petrov |
2019-09-20 | soc/intel/common/intelblocks: Remove PAD_CFG_GPI_GPIO_DRIVER_SCI | Tim Wawrzynczak |
2019-09-19 | src/soc/intel/common/block/cse: Add hmrfpo related functions to cse lib | Sridhar Siricilla |
2019-09-16 | src/soc/intel/{common,cnl,skl,icl}: Move global reset req function to common | Sridhar Siricilla |
2019-09-15 | soc/intel/skylake: add some FSP SATA params | Michael Niewöhner |
2019-09-15 | src/soc: Remove unused include <device/pci_ops.h> | Elyes HAOUAS |
2019-09-13 | intel/broadwell: Replace some __PRE_RAM__ use | Kyösti Mälkki |
2019-09-13 | soc/intel: Remove some __PRE_RAM__ use | Kyösti Mälkki |
2019-09-13 | drivers/elog: Add elog_boot_notify() | Kyösti Mälkki |
2019-09-13 | soc/intel/cannonlake: Allow coreboot to reserve stack for fsp | Bora Guvendik |
2019-09-12 | soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage | Subrata Banik |
2019-09-12 | src/{northbridge,soc}: Remove not used #include <elog.h> | Elyes HAOUAS |
2019-09-12 | src/soc/intel/common/block/cse: Make hfsts1 common & add helper functions | Sridhar Siricilla |
2019-09-12 | soc/intel/cannonlake: Add config for sata devslp pad reset configuration | Aamir Bohra |
2019-09-12 | soc/intel/{cnl, icl}: Cache the TSEG region | Subrata Banik |
2019-09-12 | soc/{amd, intel}: Make use of common postcar_enable_tseg_cache() API | Subrata Banik |
2019-09-11 | intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig | Subrata Banik |
2019-09-11 | soc/intel/common/block/cse: Move me_read_config32() to common code | Sridhar Siricilla |
2019-09-11 | arch/x86: Restrict use of _car_global[start|end] | Kyösti Mälkki |
2019-09-11 | arch/x86: Drop _car_relocatable_data symbols | Kyösti Mälkki |
2019-09-10 | soc/intel/skylake: Add option to toggle Hyper-Threading | Patrick Rudolph |
2019-09-09 | intel/fsp_broadwell_de: Add early timestamps | Kyösti Mälkki |
2019-09-09 | intel/fsp_broadwell_de: Enable CONSOLE_CBMEM by default | Kyösti Mälkki |
2019-09-09 | soc/intel/common/block/cse: Add helper function heci_send_receive | Sridhar Siricilla |
2019-09-09 | soc/intel/cannonlake: Allow coreboot to handle SPI lockdown | Subrata Banik |
2019-09-09 | soc/intel/cannonlake: Add ability to disable Heci1 | Bora Guvendik |
2019-09-06 | soc/intel/skylake: Add Lewisburg family PCH support | Maxim Polyakov |
2019-09-05 | soc/intel/cannonlake: memory spd data debug | Eric Lai |
2019-09-03 | soc/skylake: do not rely on P2SB data to generate DRHD | Angel Pons |
2019-09-03 | soc/intel/common/timer: Fix cosmetic errors as per CB:35148 review | Subrata Banik |
2019-09-03 | soc/intel/common/acpi/dptf: Add fan based active cooling for TSR sensors | Sumeet Pawnikar |
2019-09-02 | soc/intel/common/timer: Make TSC frequency calculation dynamically | Subrata Banik |
2019-09-02 | soc/skylake: prevent null pointer dereferences | Angel Pons |
2019-09-02 | soc/intel/quark: Remove variable set but not used | Elyes HAOUAS |
2019-09-02 | soc/intel/skylake: enable GMM in devicetree | Maxim Polyakov |
2019-09-02 | security/intel: Add TXT infrastructure | Patrick Rudolph |
2019-08-30 | soc/intel/skl/acpi: add description for missing PCIe ports | Maxim Polyakov |
2019-08-30 | soc/intel/skylake: Remove duplicated PCI Id | Maxim Polyakov |
2019-08-30 | intel/quark: Use common romstage entry | Kyösti Mälkki |
2019-08-30 | intel/quark: Select NO_SMM | Kyösti Mälkki |
2019-08-30 | intel/quark: Remove extra steps on entry to romstage | Kyösti Mälkki |
2019-08-29 | intel/fsp_broadwell_de: Move and rename smm_lock() | Kyösti Mälkki |
2019-08-29 | intel/fsp_broadwell_de: Use smm_subregion() | Kyösti Mälkki |
2019-08-29 | soc/intel/fsp_broadwell_de: Implement SystemAgent TSEG functions | Patrick Rudolph |
2019-08-28 | intel/broadwell: Use smm_subregion() | Kyösti Mälkki |
2019-08-28 | intel/haswell,broadwell: Rename EMRR to PRMRR | Kyösti Mälkki |
2019-08-28 | intel/braswell: Use smm_subregion() | Kyösti Mälkki |
2019-08-28 | intel/fsp_baytrail: Use smm_subregion() | Kyösti Mälkki |
2019-08-28 | google/rambi,intel/baytrail: Simplified romstage flow | Kyösti Mälkki |
2019-08-28 | soc/intel: Move fill_postcar_frame to memmap.c | Kyösti Mälkki |
2019-08-28 | soc/intel/cnl: Add CML IGD IDs | Meera Ravindranath |
2019-08-28 | soc/intel/common/block: Provide mmc.c for setting dll registers | Kane Chen |
2019-08-27 | intel/baytrail: Use smm_subregion() | Kyösti Mälkki |
2019-08-27 | intel/baytrail: Reorganize romstage.c | Kyösti Mälkki |
2019-08-27 | soc/intel/fsp_broadwell_de: Add ACPI HPET table | Johnny Lin |
2019-08-27 | soc/intel/{apl,cnl,dnv,icl,skl} : Use common cpu/intel/car/romstage.c code | Subrata Banik |
2019-08-26 | intel/car: Use common TS_START_ROMSTAGE | Kyösti Mälkki |
2019-08-26 | lib/bootblock: Add simplified entry with basetime | Kyösti Mälkki |
2019-08-26 | soc/intel: Use common romstage code | Kyösti Mälkki |
2019-08-26 | Split MAYBE_STATIC to _BSS and _NONZERO variants | Kyösti Mälkki |
2019-08-26 | soc/intel/cannonlake: Add config to disable display audio codec | Aamir Bohra |
2019-08-22 | arch/x86: Add <arch/romstage.h> | Kyösti Mälkki |
2019-08-21 | arch/x86: Rename some mainboard_romstage_entry() | Kyösti Mälkki |
2019-08-21 | soc/intel/common/smm: Add missing printk statement | Tim Wawrzynczak |
2019-08-21 | soc/intel/common: use PAD_BUF() inside PAD_CFG_* macros | Maxim Polyakov |
2019-08-21 | soc/intel/common: gpio_defs: set trig to disable in PAD_NC | Maxim Polyakov |
2019-08-21 | soc/intel/common: Set controller state to active in uart init | Usha P |
2019-08-21 | intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor | Kyösti Mälkki |
2019-08-20 | soc/intel/cnl: Add provision to configure SD controller write protect pin | Aamir Bohra |