coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-06	soc/intel/apl: Add panel power and backlight configuration	Nico Huber
2020-09-06	soc/intel: skl,cnl,icl,jsl,tgl: disable usb over-current pin by default	Michael Niewöhner
2020-09-05	soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik
2020-09-04	soc/intel/{jasperlake,tigerlake}/Kconfig: Drop redundant 'select CPU_INTEL_CO...	Elyes HAOUAS
2020-09-04	soc/intel/cnl: Enable HECI3 depending on devicetree	Felix Singer
2020-09-04	soc/intel/tigerlake: Remove unused PID_SDX macro	Subrata Banik
2020-09-03	soc/intel/cnl: Allow using the remaining Comet Lake FSPs	Felix Singer
2020-09-03	3rdparty/fsp: Update submodule pointer to current master	Felix Singer
2020-09-03	soc/intel/cnl: Add new Kconfig option which matches its FSPs name	Felix Singer
2020-09-02	soc/intel/tigerlake: Add mainboard hook for overriding SoC config	Jes Klinke
2020-09-02	soc/intel/xeon_sp/Kconfig: Drop redundant 'select POSTCAR_CONSOLE'	Elyes HAOUAS
2020-09-02	{nb,soc}/intel/{haswell,broadwell}/memmap.c: Use ALIGN_DOWN(x, a)	Elyes HAOUAS
2020-09-01	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	Subrata Banik
2020-08-31	soc/intel/elkhartlake/romstage: Do initial SoC commit till romstage	Tan, Lean Sheng
2020-08-31	soc/intel/elkhartlake/bootblock: Do initial SoC commit until bootblock	Tan, Lean Sheng
2020-08-29	PCI IDs: Add PCI ID for CML DPTF/DTT PCI device	Edward O'Callaghan
2020-08-28	vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt soc	Jonathan Zhang
2020-08-28	soc/intel/tigerlake: add ddr4-spd-empty.hex	Aaron Durbin
2020-08-28	util: Add memory parts needed by zork boards	Rob Barnes
2020-08-28	util/gen_spd: translate DeviceBusWidth to die bus width	Nick Vaccaro
2020-08-28	util: rename lp4x spds to include "lp4x-" in name	Nick Vaccaro
2020-08-28	util: volteer/dedede: move generic SPDs to common location	Nick Vaccaro
2020-08-27	soc/intel/common: Include Elkhart Lake SA IDs	Tan, Lean Sheng
2020-08-27	soc/intel/common: Add Elkhart Lake B0 CPU ID	Tan, Lean Sheng
2020-08-26	soc/intel/tigerlake: Rename pch_init() code	Alexey Buyanov
2020-08-25	util: Add spd_tools to generate DDR4 SPDs for TGL boards	Nick Vaccaro
2020-08-25	soc/intel/jasperlake: Disable multiphase SI init	Ronak Kanabar
2020-08-25	soc/intel/jasperlake: Select PLATFORM_USES_FSP2_2	Ronak Kanabar
2020-08-24	mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms	Shelley Chen
2020-08-24	soc/intel/jasperlake: Run pmc_set_acpi_mode() during .init in pmc_ops	Kane Chen
2020-08-24	soc/intel/tigerlake: Fix IPU and Vtd config	Ravi Sarawadi
2020-08-24	soc/intel/jasperlake: use UDK_202005_BINDING	Ronak Kanabar
2020-08-24	soc/intel/common: Add downgrade support for CSE Firmware	Sridhar Siricilla
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	SMM: Validate more user-provided pointers	Patrick Rudolph
2020-08-21	soc/intel/tigerlake: Enable long cr50 ready pulses	Jes Klinke
2020-08-21	soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE	Harshit Sharma
2020-08-20	cse_lite: Move global reset after MRC writeback	Caveh Jalali
2020-08-20	soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'	Elyes HAOUAS
2020-08-18	elog: rename ELOG_WAKE_SOURCE_GPIO to ELOG_WAKE_SOURCE_GPE	Aaron Durbin
2020-08-18	soc/intel/jasperlake: Fix PMC_GPE_DW mapping	Meera Ravindranath
2020-08-18	soc/intel/jasperlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 5KB	Meera Ravindranath
2020-08-18	src: Remove unused 'include <delay.h>'	Elyes HAOUAS
2020-08-18	src: Remove unused 'include <lib.h>'	Elyes HAOUAS
2020-08-18	soc/intel/common/block/pmc/pmclib.c: Remove unused '<pc80/mc146818rtc.h>'	Elyes HAOUAS
2020-08-18	src: Remove unused 'include <stddef.h>	Elyes HAOUAS
2020-08-18	src: Remove unneded whitespace before tab	Elyes HAOUAS
2020-08-18	xeon_sp/cpx: Fix get_system_memory_map to return the correct address	Johnny Lin
2020-08-18	xeon_sp/cpx: Enable ACPI P-state support	Jingle Hsu
2020-08-18	soc/intel/jasperlake: Configure IPU based on devicetree	Maulik V Vaghela
2020-08-18	soc/intel/common: Add support for LPSS UART in ACPI mode	Patrick Rudolph
2020-08-17	soc/intel/skylake/acpi.c: Name devices on secondary bus	Benjamin Doron
2020-08-17	soc/intel/tigerlake: Allow fine grained control of S0iX states	Jes Klinke
2020-08-17	{soc/intel/common,sb/intel/lynxpoint}/hda_verb.c: Reduce differences	Elyes HAOUAS
2020-08-17	soc/intel/common: Move common HDA registers to <device/azalia_device.h>	Elyes HAOUAS
2020-08-17	soc/intel/skylake: Call mainboard ACPI sleep methods	Benjamin Doron
2020-08-17	soc/intel/jasperlake: Add IGD Device ID	Krishna Prasad Bhat
2020-08-17	soc/intel/jasperlake: Add FSP UPDs for minimum assertion widths	V Sowmya
2020-08-14	soc/intel/tigerlake: Increase PRERAM_CBMEM_CONSOLE_SIZE to 5KB	Ravi Sarawadi
2020-08-14	soc/intel/skylake: Refactor PEG configuration	Felix Singer
2020-08-14	soc/intel/skylake: Factor out unnecessary if-else-block	Felix Singer
2020-08-14	soc/intel/skylake: Use PEG definitions from pci_devs.h	Felix Singer
2020-08-14	soc/intel/skylake: Add PEG device definitions to pci_devs.h	Felix Singer
2020-08-14	soc/intel/xeon_sp/cpx: add VT-d support	Jonathan Zhang
2020-08-14	soc/intel/xeon_sp/cpx: remove unsupported configs	Jonathan Zhang
2020-08-14	soc/intel/common/cse_lite: Perform a board specific reset	Karthikeyan Ramasubramanian
2020-08-13	soc/intel/skylake: Refactor ternary expressions	Felix Singer
2020-08-13	soc/intel/xeon_sp/cpx: add CPUID for CPX-SP A1 processor	Jonathan Zhang
2020-08-13	soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitions	Sridhar Siricilla
2020-08-12	soc/intel/cannonlake: Set FSP-M UPD Heci1BarAddress	Sridhar Siricilla
2020-08-12	soc/intel/common/block/sata: Add common SATA driver	Subrata Banik
2020-08-12	soc/intel/tigerlake: Add IRQs for LPSS uart	Patrick Rudolph
2020-08-11	soc/intel/common/block/gspi: Recalculate BAR after resource allocation	Jes Klinke
2020-08-11	xeon_sp/cpx: Enable PCH thermal device via FSP	Johnny Lin
2020-08-10	soc/intel/apollolake: Rename UART irqs	Patrick Rudolph
2020-08-10	soc/intel/apollolake: Add irq.h	Patrick Rudolph
2020-08-10	soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices	Patrick Rudolph
2020-08-09	soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming	Aamir Bohra
2020-08-08	vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt soc	Jonathan Zhang
2020-08-08	soc/intel/skylake: Enable CIO depending on devicetree configuration	Felix Singer
2020-08-08	soc/intel/skylake: Enable SA IMGU depending on devicetree configuration	Felix Singer
2020-08-08	soc/intel/skylake: Add IMGU definitions to pci_devs.h	Felix Singer
2020-08-08	soc/intel/skylake: Enable SDXC depending on devicetree configuration	Felix Singer
2020-08-07	soc/intel/skylake: Enable thermal subsystem depending on devicetree	Felix Singer
2020-08-07	soc/intel/skylake: Add SA thermal subsystem definitions to pci_devs.h	Felix Singer
2020-08-07	soc/intel/cnl: Set Heci1Disable depending on devicetree config	Felix Singer
2020-08-07	xeon_sp/cpx: Enable HWP Intel Speed Shift	Johnny Lin
2020-08-07	soc/intel/broadwell/iobp: Log success in `pch_iobp_write()`	Angel Pons
2020-08-07	soc/intel/common: Log CSE FW Status Registers before triggering recovery	Sridhar Siricilla
2020-08-07	soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASE	Subrata Banik
2020-08-07	src/soc/intel/icelake: Allow option to use USE_INTEL_FSP_MP_INIT	Subrata Banik
2020-08-06	soc/intel/tigerlake: add common routine for DDR init	Nick Vaccaro
2020-08-06	soc/intel/common/block/cpu: Refactor init_cpus function	Subrata Banik
2020-08-05	{sb,soc}/intel/*/acpi/lpc.asl: Drop commented-out code	Angel Pons
2020-08-05	{nb,soc}/intel: Use get_current_microcode_rev() for ucode version	Subrata Banik
2020-08-05	src: Use space after 'if', 'for'	Elyes HAOUAS
2020-08-05	src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resource	Subrata Banik
2020-08-05	soc/intel/common: Include Alder Lake device IDs	Subrata Banik
2020-08-04	soc/intel/skylake: Add RMRRs after all DRHDs	Angel Pons
2020-08-04	soc/intel/broadwell: Add RMRRs after all DRHDs	Angel Pons