Age | Commit message (Expand) | Author |
2020-11-20 | soc/intel/xeon_sp/cpx: Modify PCH_IOAPIC_BUS_NUMBER | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp: Set coreboot defined IOAPIC and HPET BDF | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp: Use common P2SB functions to generate HPET IOAPIC | Arthur Heymans |
2020-11-20 | soc/intel/apollolake: use P2SB function to generate DMAR IOAPIC | Arthur Heymans |
2020-11-20 | soc/intel/common/block/p2sb: Add ioapic BDF functions | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp: Use common P2SB functions to generate HPET DMAR | Arthur Heymans |
2020-11-20 | soc/intel/apollolake: use P2SB function to generate DMAR HPET | Arthur Heymans |
2020-11-20 | soc/intel/common/block/p2sb: Add hpet BDF functions | Arthur Heymans |
2020-11-20 | soc/intel/common/p2sb: Add helper function to determine p2sb state | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp: Lock down DMICTL | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp/cpx: Lock down P2SB SBI | Arthur Heymans |
2020-11-20 | soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callback | Arthur Heymans |
2020-11-20 | soc/intel/denverton_ns: Initialize thermal configuration | Julien Viard de Galbert |
2020-11-20 | soc/intel/denverton_ns: Enable MC Exception | Julien Viard de Galbert |
2020-11-20 | src/soc/intel/denverton_ns: Use improvement in coreboot since 4.9 | Julien Viard de Galbert |
2020-11-20 | soc/intel/common: Use per-soc definition for BAR sizes | Duncan Laurie |
2020-11-20 | soc/intel/common/block/cse: Clear post code before reset | Duncan Laurie |
2020-11-20 | soc/intel/tigerlake: Enable GPIO IOSTANDBY configuration | Duncan Laurie |
2020-11-20 | soc/intel/tigerlake: Expose UPD to enable Precision Time Measurement | Duncan Laurie |
2020-11-20 | soc/intel/tigerlake: Enable RTD3 driver and IPC mailbox | Duncan Laurie |
2020-11-20 | soc/intel/common: Add PCIe Runtime D3 driver for ACPI | Duncan Laurie |
2020-11-20 | soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD | Michael Niewöhner |
2020-11-20 | soc/intel/common/acpi: add _HID to PEPD | Michael Niewöhner |
2020-11-20 | soc/intel/common/acpi: correct return value for PEPD enum function | Michael Niewöhner |
2020-11-20 | soc/intel/common/acpi: work around Windows crash on S0ix-enabled boards | Michael Niewöhner |
2020-11-20 | soc/intel/common/acpi: drop return value for disabled PEPD function 2 | Michael Niewöhner |
2020-11-20 | soc/intel/common/acpi: rename PEPD/LPI macros for clarification | Michael Niewöhner |
2020-11-19 | soc/intel/common/acpi: rename LPID to PEPD | Michael Niewöhner |
2020-11-19 | soc/intel/common/acpi: move S0ix UUID to the condition | Michael Niewöhner |
2020-11-19 | soc/intel/common/acpi: drop the southridge scope around PEPD | Michael Niewöhner |
2020-11-18 | soc/intel/common: Move CSE RW into new FMAP region to optimize boot time | Sridhar Siricilla |
2020-11-18 | soc/intel/common: Generate the CSE RW metadata and add to FW_MAIN_A/B | V Sowmya |
2020-11-18 | soc/intel/common: Add Kconfig to enable the CSE FW Update feature | V Sowmya |
2020-11-18 | soc/intel/common: Add Kconfig for CSE RW firmware version | V Sowmya |
2020-11-17 | soc/intel/xeon_sp: Fix SKX SATA drive boot issue | Marc Jones |
2020-11-17 | src: Add missing 'include <console/console.h>' | Elyes HAOUAS |
2020-11-16 | src: Update some incorrect config options in comments | Martin Roth |
2020-11-16 | soc/intel/denverton_ns: Generate ACPI DMAR Table | Julien Viard de Galbert |
2020-11-16 | soc/intel/xeon_sp: Synchronize DMAR and MADT IOAPIC id's | Arthur Heymans |
2020-11-16 | soc/intel/broadwell/systemagent.c: Rename to `northbridge.c` | Angel Pons |
2020-11-16 | lp4x: Add new memory parts and generate SPDs | David Wu |
2020-11-14 | soc/intel/cnl: enable ACPI CPPC entries generation | Michael Niewöhner |
2020-11-14 | soc/intel/common/block: add code for ACPI CPPC entries generation | Michael Niewöhner |
2020-11-14 | soc/intel/xeon_sp: Improve generating PCH IOAPIC MADT entry | Arthur Heymans |
2020-11-13 | mrc_cache: Move code for triggering memory training into mrc_cache | Shelley Chen |
2020-11-13 | soc/intel/cnl: replace the remains of HeciEnabled by device state in dt | Michael Niewöhner |
2020-11-13 | soc/intel/tigerlake: Add code for early tcss | Brandon Breitenstein |
2020-11-13 | soc/intel/xeon_sp/acpi.c Loop over HOB stack for MADT generation | Arthur Heymans |
2020-11-13 | soc/intel/xeon_sp: move get_iiostack_info() to a common place | Arthur Heymans |
2020-11-13 | soc/intel/xeon_sp: Change the return type of get_iio_stack_info() | Arthur Heymans |
2020-11-13 | soc/intel/common/block/acpi: add Kconfig for CPPC entries generation | Michael Niewöhner |
2020-11-13 | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner |
2020-11-13 | soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling | Michael Niewöhner |
2020-11-13 | soc/intel/common: add Kconfig to enable/disable the ACPI PM timer | Michael Niewöhner |
2020-11-13 | soc/intel/broadwell: Split up acpi.c | Angel Pons |
2020-11-13 | soc/intel/broadwell: Flatten northbridge folder structure | Angel Pons |
2020-11-13 | soc/intel/broadwell: Relocate CPU files | Angel Pons |
2020-11-13 | broadwell: Flatten `acpi_init_gnvs` function | Angel Pons |
2020-11-13 | broadwell: Factor out `acpi_fill_madt` function | Angel Pons |
2020-11-13 | soc/intel/broadwell/acpi: Rename `systemagent.asl` | Angel Pons |
2020-11-13 | soc/intel/broadwell/pch/acpi/hda.asl: Rename to `audio.asl` | Angel Pons |
2020-11-13 | soc/intel/broadwell/pch/acpi: Clean up cosmetics | Angel Pons |
2020-11-13 | soc/intel/xeon_sp: Tidy up adding MADT ioapic entries | Arthur Heymans |
2020-11-12 | soc/intel/xeon_sp: Use a common function to get the IIO HOB | Arthur Heymans |
2020-11-12 | soc/intel/alderlake: Add PCH ID 0x5181 | Subrata Banik |
2020-11-11 | mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOS | Shreesh Chhabbi |
2020-11-11 | soc/intel/tigerlake: Update Kconfig for NEM Enhanced Mode | Shreesh Chhabbi |
2020-11-10 | soc/intel/tigerlake: Log PM event from an internal device | Karthikeyan Ramasubramanian |
2020-11-10 | soc/intel/jasperlake: Log PM event from an internal device | Karthikeyan Ramasubramanian |
2020-11-09 | soc/intel/skylake: Enable PCH thermal depending on devicetree | Benjamin Doron |
2020-11-09 | soc/intel/jasperlake: Enable Intel FIVR RFI settings | Maulik V Vaghela |
2020-11-09 | soc/intel/xeon_sp: Don't add memory resource twice | Marc Jones |
2020-11-09 | soc/intel/xeon_sp: Move set_bios_init_completion() | Marc Jones |
2020-11-09 | soc/intel/xeon_sp: Look up the IIO_HOB only once | Arthur Heymans |
2020-11-09 | soc/intel/jasperlake: Correct GPIO pad sequence for community pad group | Maulik V Vaghela |
2020-11-09 | soc/intel/jasperlake: Update reserved GPIO names in gpio_soc_defs.h | Maulik V Vaghela |
2020-11-09 | soc/intel/jasperlake: Add PCH PCIe RPs wake up events to event log | Tim Wawrzynczak |
2020-11-09 | soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log | Tim Wawrzynczak |
2020-11-09 | soc/intel/common/acpi: create pep.asl from lpit.asl | Michael Niewöhner |
2020-11-09 | intel/common/pmc: Add functions for IPC mailbox in ACPI | Duncan Laurie |
2020-11-09 | soc/intel/tigerlake: Utilize vbt data size Kconfig option | Srinidhi N Kaushik |
2020-11-09 | soc/intel/*/chip: Remove unused devicetree entry | Patrick Rudolph |
2020-11-09 | acpi: Call acpi_fill_ssdt() only for enabled devices | Karthikeyan Ramasubramanian |
2020-11-09 | soc/intel/xeon_sp/skx: Reorder soc_util.c | Marc Jones |
2020-11-07 | mb/intel: Enable ALC711 Audio codec over SNDW0 link | Sridhar Siricilla |
2020-11-06 | soc/intel/xeon_sp/skx: Fix MADT CPU indexes | Marc Jones |
2020-11-06 | soc/intel/xeon_sp: Move CPU helper functions | Marc Jones |
2020-11-06 | soc/intel/xeon_sp/cpx: Reorder cpu.c .h includes | Marc Jones |
2020-11-05 | soc/intel/tigerlake: Disable C1 C-state Demotion | Ravi Sarawadi |
2020-11-05 | soc/intel/xeon_sp: Use common cpu/intel romstage entry | Arthur Heymans |
2020-11-04 | soc/intel/broadwell: Merge `device_nvs.asl` into `globalnvs.asl` | Angel Pons |
2020-11-04 | soc/intel/broadwell: Include EC and IRQ links ACPI early | Angel Pons |
2020-11-04 | soc/intel/broadwell/pch: Use common PCIe ACPI code | Angel Pons |
2020-11-04 | soc/intel/broadwell/pch/acpi: Add PCIe register offsets | Angel Pons |
2020-11-04 | soc/intel/broadwell/gma.c: Align struct with Haswell | Angel Pons |
2020-11-04 | soc/intel/broadwell: Use common irqlinks.asl | Angel Pons |
2020-11-04 | soc/intel/broadwell/pch/acpi/irqlinks.asl: Add missing IRQs | Angel Pons |
2020-11-04 | soc/intel/broadwell: Align ACPI with Haswell/Lynxpoint | Angel Pons |
2020-11-04 | soc/intel/xeon_sp: Add a smm_region function | Arthur Heymans |
2020-11-04 | soc/intel/xeon_sp: Convert to ASL 2.0 syntax | Elyes HAOUAS |