summaryrefslogtreecommitdiff
path: root/src/soc/intel
AgeCommit message (Expand)Author
2015-07-06Braswell: Update to end of June.Lee Leahy
2015-07-06Braswell: Update the ACPI tablesLee Leahy
2015-07-04Kconfig: Fix references to obsolete symbolsMartin Roth
2015-07-02Move baytrail & fsp_baytrail to the common IFD interface.Martin Roth
2015-06-26soc/intel/common: Restrict common romstage/ramstage code to FSPLee Leahy
2015-06-25Braswell: Remove copyright addressLee Leahy
2015-06-25Braswell: Add Braswell SOC supportLee Leahy
2015-06-25soc/intel/common/Kconfig: Fix warning & whitespaceMartin Roth
2015-06-24Intel/common: Remove copyright addressLee Leahy
2015-06-24Intel Common SOC: Add romstage supportLee Leahy
2015-06-24Kconfig: Get rid of obsolete symbolsMartin Roth
2015-06-23Kconfig: Move CBFS_SIZE into Mainboard menuMartin Roth
2015-06-23intel/broadwell: Fix refcode handlingPatrick Georgi
2015-06-23broadwell: fix typoPatrick Georgi
2015-06-22Remove incorrect Kconfig expressionsMartin Roth
2015-06-21Remove old HAVE_UART_MEMORY_MAPPED select statementsMartin Roth
2015-06-09stage_cache: use cbmem init hooksAaron Durbin
2015-06-09cbmem: add indicator to hooks if cbmem is being recoveredAaron Durbin
2015-06-09cbmem: Unify CBMEM init tasks with CBMEM_INIT_HOOK() APIKyösti Mälkki
2015-06-08Remove empty lines at end of fileElyes HAOUAS
2015-06-05device_ops: add device_t argument to write_acpi_tablesAlexander Couzens
2015-06-05device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens
2015-06-05device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens
2015-06-04devicetree: Change scan_bus() prototype in device opsKyösti Mälkki
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-06-02assets: abstract away the firmware assets used for bootingAaron Durbin
2015-06-02cbfs: new API and better program loadingAaron Durbin
2015-05-29intel/broadwell: Hide use of acpi_slp_typeKyösti Mälkki
2015-05-29chromeos: always enable timestampsStefan Reinauer
2015-05-28smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko
2015-05-28Remove address from GPLv2 headersPatrick Georgi
2015-05-27Move TPM code out of chromeosVladimir Serbinenko
2015-05-26fmap: new API using region_deviceAaron Durbin
2015-05-26acpigen: Remove all explicit length trackingVladimir Serbinenko
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-23baytrail: Switch to per-device ACPIVladimir Serbinenko
2015-05-23Braswell: Use Baytrail as Comparison BaseLee Leahy
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-20acpi: make fill_slit and fill_srat into arguments.Vladimir Serbinenko
2015-05-13baytrail: broadwell: correct refcode loadingAaron Durbin
2015-05-053rdparty: move to 3rdparty/blobsPatrick Georgi
2015-05-053rdparty: Move to blobsPatrick Georgi
2015-05-04intel/fsp_baytrail: Fix SPI debuggingDavid Imhoff
2015-05-01intel: Correct MMIO related ACPI table settingsDave Frodin
2015-04-30intel/broadwell: Allow using non-fake IFD descriptorPatrick Georgi
2015-04-30intel/broadwell: bootstate mechanism only exists in ramstagePatrick Georgi
2015-04-30intel/broadwell: Don't select MONOTONIC_TIMER_MSRPatrick Georgi
2015-04-30intel/broadwell: Build monotonic timer driver for SMMPatrick Georgi
2015-04-30chromeos: Add missing headersPatrick Georgi
2015-04-30kbuild: Don't require intel/common changes for every socStefan Reinauer
2015-04-29kbuild: automatically include SOCsStefan Reinauer
2015-04-28fsp platforms: consolidate FspNotify callsMartin Roth
2015-04-27intel/fsp_baytrail: Fix default SMM_TSEG_SIZE valueDavid Imhoff
2015-04-24fsp: Move fsp to fsp1_0Marc Jones
2015-04-22intel/broadwell: guard CHROMEOS support betterPatrick Georgi
2015-04-22coreboot: common stage cacheAaron Durbin
2015-04-21broadwell: Clear USB3.0 PORTSC status bits in sleep_prepare.Todd Broch
2015-04-21broadwell: indent xhci codePatrick Georgi
2015-04-21broadwell: Skip pre-graphics delay in resume pathDuncan Laurie
2015-04-21broadwell: Implement Recovery ButtonRyan Lin
2015-04-18broadwell: Set C9/C10 vccminDuncan Laurie
2015-04-18broadwell: Disable XHCI compliance mode entryDuncan Laurie
2015-04-18soc/intel/common: Add common reset codeLee Leahy
2015-04-18soc/intel/common: Add function to protect MRC cacheDuncan Laurie
2015-04-18broadwell: add ROM stage pre console init call backWenkai Du
2015-04-15broadwell: Fixes for _SWS supportDuncan Laurie
2015-04-15broadwell: Remove unused bootblock codeDuncan Laurie
2015-04-15broadwell: Clean up ME device and add new ME10 flowDuncan Laurie
2015-04-15soc/baytrail: Use microcode from the blobs repositoryMarc Jones
2015-04-15soc/broadwell: Use microcode from the blobs repositoryMarc Jones
2015-04-14broadwell: Remove TPM device from lpc.aslDuncan Laurie
2015-04-13broadwell: Work around VBIOS framebuffer issueDuncan Laurie
2015-04-13broadwell: Fix incorrect SATA port map maskWenkai Du
2015-04-13broadwell: Enable double self refresh by defaultDuncan Laurie
2015-04-10baytrail: correct NC pin to GPO pin according to BYT platform design guideKane Chen
2015-04-10broadwell: Correct XHCI offset for USB 3.0 portsJulius Werner
2015-04-10broadwell: Set PCIe replay timeout to 0xDDuncan Laurie
2015-04-10baytrail: add code for supporting 2x ddr refresh rateKane Chen
2015-04-10broadwell: Add configuration for tuning VR for C-state operationsDuncan Laurie
2015-04-10broadwell: Preserve VbNv around cmos_initDuncan Laurie
2015-04-10broadwell: Add function to apply PRR to a range of SPI flashDuncan Laurie
2015-04-10broadwell: Turn off panel backlight in S5 SMI handlerDuncan Laurie
2015-04-10broadwell: Skip steps when disabling PCIe portDuncan Laurie
2015-04-10broadwell: Remove XHCI workarounds on WPTDuncan Laurie
2015-04-10broadwell: Only do pre-graphics delay when running option romDuncan Laurie
2015-04-10broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du
2015-04-10broadwell: Update SATA Gen3 TX adjustment registersDuncan Laurie
2015-04-10broadwell: Add a few bits to finalize stepDuncan Laurie
2015-04-10baytrail: fix the coding error on PCIe L1 exit latencyKevin L Lee
2015-04-10Baytrail: Prior to PCI scan, wait for LCTL to be active in 50 msKevin Hsieh
2015-04-10Broadwell: Set boot_mode of pei_data before running reference codeKenji Chen
2015-04-10broadwell: Increase I2C SDA hold timing to 300nsChiranjeevi Rapolu
2015-04-10broadwell: add RCBA posting read after writingWenkai Du
2015-04-10Broadwell: Synchronization with FRC for Root Port Power ManagementKenji Chen
2015-04-10broadwell: Skip DDI-A enable in S3 resumeDuncan Laurie
2015-04-10broadwell: Add support for ACPI \_GPE._SWSDuncan Laurie
2015-04-10baytrail: Switch from ACPI mode to PCI mode for legacy supportMarc Jones
2015-04-08console: fix Kconfig usesPatrick Georgi
2015-04-07broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner
2015-04-07baytrail: Change all SoC headers to <soc/headername.h> systemJulius Werner
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 18:31:44 +0000