coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-11-20	soc/intel/xeon_sp/{skx,cpx}: Add txt_get_chipset_dpr callback	Arthur Heymans
	Change-Id: Id824324325d05b52fb2b9ced04fd3539cc37bd55 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46555 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-05	soc/intel/xeon_sp: Use common cpu/intel romstage entry	Arthur Heymans
	This removes some boilerplate like starting the console and also adds a "start of romstage" timestamp. Change-Id: Ie85df5d244fa37c41f0b3177ca325c607fa54593 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46658 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-04	soc/intel/xeon_sp: Add a smm_region function	Arthur Heymans
	This reports where TSEG is located and will be used when setting up SMM. Change-Id: I9a89cc79b08e2dcf1ffb91aa27d92c387cc93bfd Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>