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path: root/src/soc/intel/tigerlake
AgeCommit message (Expand)Author
2020-02-25soc/intel/common/block: Move cse common functions into block/cseSubrata Banik
2020-02-25soc/intel/common/block: Move smihandler common functions into common codeSubrata Banik
2020-02-19soc/tigerlake: Add IRQ header and ACPI support for JSPMeera Ravindranath
2020-02-17soc/intel/tigerlake: Enable Audio on TGLSrinidhi N Kaushik
2020-02-17src/intel: Define HFSTS3 registerSridhar Siricilla
2020-02-17src/soc/tigerlake: Accomodate JSP specific changes in iomap.hMeera Ravindranath
2020-02-17soc/tigerlake: Add Device id for Tiger Lake Dual CoreSrinidhi N Kaushik
2020-02-17soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn
2020-02-17soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn
2020-02-17vboot: remove VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT optionJoel Kitching
2020-02-15soc/tigerlake: Update xhci ACPI files for JSPMeera Ravindranath
2020-02-15soc/intel/tigerlake: Update PMC Register Base and platform check for JSPUsha P
2020-02-15soc/intel/tigerlake: Update Kconfig related to JSLUsha P
2020-02-09soc/intel/tigerlake: add memory configuration supportNick Vaccaro
2020-02-09soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_messa...Sridhar Siricilla
2020-02-09soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoCSridhar Siricilla
2020-02-04soc/intel: Add get_pmbaseEugene Myers
2020-02-01soc/intel/tigerlake: Configure TCSS xHCI and xDCIWonkyu Kim
2020-01-29soc/intel/tigerlake: Disable image clocksWonkyu Kim
2020-01-28soc/intel/tigerlake: Enable DP ports according to board designWonkyu Kim
2020-01-25soc/intel/tigerlake: Add IPU in ACPIWonkyu Kim
2020-01-25soc/intel/tigerlake: Configure ClkReq according to mainboard designWonkyu Kim
2020-01-25soc/intel/tigerlake: Add GPIO helper functionShaunak Saha
2020-01-25soc/intel/tigerlake: Fix GPIO communitiesShaunak Saha
2020-01-24soc/intel/tigerlake: Enable SATAWonkyu Kim
2020-01-22soc/intel/tigerlake: enable gpio dual route supportNick Vaccaro
2020-01-22soc/intel/tigerlake: Update fsp_params for TGLSrinidhi N Kaushik
2020-01-22soc/intel/tigerlake: Update GPIO configRavi Sarawadi
2020-01-22soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng
2020-01-22soc/intel/tigerlake: Update interrupt infoWonkyu Kim
2020-01-18soc/intel/tigerlake: Update ACPI filesRavi Sarawadi
2020-01-18soc/intel/tigerlake: Update pci dev definitionWonkyu Kim
2020-01-18soc/intel/tigerlake: Update chip filesRavi Sarawadi
2020-01-16soc/intel/{cnl,icl,skl, tgl}: Move SOC_INTEL_COMMON_BLOCK_THERMAL into SoC sp...Subrata Banik
2020-01-15soc/intel/tigerlake: Update header filesRavi Sarawadi
2020-01-13soc/intel/tigerlake: Select correct fsp_param as per SoC KconfigMaulik V Vaghela
2020-01-12soc/intel: Fix ACPI device operations initializationKarthikeyan Ramasubramanian
2020-01-10soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource properSubrata Banik
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2020-01-09soc/intel/tigerlake: Update KconfigRavi Sarawadi
2020-01-09soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpiSubrata Banik
2020-01-08soc/intel/tigerlake: Fix PMC configRavi Sarawadi
2020-01-07soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL codeSubrata Banik
2019-12-31soc/intel/{icl,cnl,tgl}: Always add PM1_TMR block to FADTMeera Ravindranath
2019-12-20soc/intel/tigerlake: Update FSP stack and heap sizeMaulik V Vaghela
2019-12-19soc/intel/tigerlake: Add required header files in pch.cAamir Bohra
2019-12-19src/soc/intel: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-19src: Use '#include <smp/node.h>' when appropriateElyes HAOUAS
2019-12-16soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper LakeAamir Bohra
2019-12-16soc/intel/tigerlake: Pick correct pmc base reg from pch typeMaulik V Vaghela
2019-12-12soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.hFurquan Shaikh
2019-12-11soc/intel/tigerlake: Include soc common lpss header fileAamir Bohra
2019-12-11soc/intel/tigerlake: add soc implementation for ETR address APIAamir Bohra
2019-12-10soc/intel/common: Add Jasperlake Device IDsrkanabar
2019-12-02soc/intel/tigerlake: Change compilation based on TIGERLAKE_BASEMaulik V Vaghela
2019-11-28soc/intel/tigerlake: select correct chipset based on soc KconfigMaulik V Vaghela
2019-11-27soc/intel/tigerlake: Fix smm_relocation_paramsKyösti Mälkki
2019-11-25soc/intel/tigerlake: Add Jasperlake soc KconfigMaulik V Vaghela
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-22intel/smm: Provide common smm_relocation_paramsKyösti Mälkki
2019-11-15soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()Subrata Banik
2019-11-14soc/intel/tigerlake: Include few more Tigerlake device IDsSubrata Banik
2019-11-12soc/intel/tigerlake: Remove FSP-T option in KconfigArthur Heymans
2019-11-12soc/intel/tigerlake: Remove deprecated CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_T...Subrata Banik
2019-11-11soc/intel/tigerlake: Fix cbmem_topArthur Heymans
2019-11-09soc/intel/tigerlake/acpi: Copy acpi directory from icelakeSubrata Banik
2019-11-09soc/intel/tigerlake: Do initial SoC commit till ramstageSubrata Banik
2019-11-09soc/intel/tigerlake/romstage: Do initial SoC commit till romstageSubrata Banik
2019-11-09soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblockSubrata Banik