Age | Commit message (Expand) | Author |
2020-08-06 | soc/intel/tigerlake: add common routine for DDR init | Nick Vaccaro |
2020-08-05 | {nb,soc}/intel: Use get_current_microcode_rev() for ucode version | Subrata Banik |
2020-08-03 | soc/intel/tigerlake: Invoke PCIe root port swapping | Caveh Jalali |
2020-08-01 | soc/intel/{icl,jsl,tgl}: Remove SkipMpInit UPD as deprecated | Subrata Banik |
2020-07-29 | soc/intel/tigerlake: Configure TCSS D3Hot and D3Cold | John Zhao |
2020-07-29 | soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dB | Duncan Laurie |
2020-07-28 | soc/intel/tigerlake: Simplify is-device-enabled checks | Felix Singer |
2020-07-26 | soc/intel/tigerlake: Disable CPU PCIe in FSP | Shaunak Saha |
2020-07-26 | soc/intel/tigerlake: Disable VT-d and no DMAR table for pre-QS platform | John Zhao |
2020-07-26 | src/soc/intel: Add include <types.h> | Elyes HAOUAS |
2020-07-26 | src: Update bare access to BOOL CONFIG_ vals to CONFIG() | Martin Roth |
2020-07-26 | cpu,soc/intel: Drop select SMP | Kyösti Mälkki |
2020-07-26 | src: Remove unused 'include <cbmem.h>' | Elyes HAOUAS |
2020-07-26 | src: Remove extra lines in license header | Elyes HAOUAS |
2020-07-25 | soc/intel/tigerlake: Update Pkg C-State latencies | Ravi Sarawadi |
2020-07-25 | soc/intel/tigerlake: Set power limits for Tiger Lake Y-SKU | Sumeet R Pawnikar |
2020-07-25 | soc/intel/tigerlake: Update Tiger Lake SA IDs | Derek Huang |
2020-07-21 | soc/intel/tigerlake: Select PLATFORM_USES_FSP2_2 | Subrata Banik |
2020-07-21 | src: Use ACPI macros | Elyes HAOUAS |
2020-07-15 | soc/intel/tigerlake: Hook up SATA Port Enable DITO UPDs | Shaunak Saha |
2020-07-14 | src: Remove unused 'include <stdint.h> | Elyes HAOUAS |
2020-07-12 | soc/intel/tigerlake: Move tco_configure to bootblock | Tim Wawrzynczak |
2020-07-12 | soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device | John Zhao |
2020-07-12 | soc/intel/tigerlake: Add Type-C IOM base address and size macro | John Zhao |
2020-07-12 | soc/intel/tigerlake: Add new IGD device | Ravi Sarawadi |
2020-07-09 | mainboard/intel/tglrvp: Remove unused PrmrrSize chip config | Subrata Banik |
2020-07-07 | soc/intel/common/block: Add new block DTT | Tim Wawrzynczak |
2020-07-07 | soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master | John Zhao |
2020-07-07 | soc/intel/{tiger,jasper}lake: Add IPU to soc_acpi_name | Tim Wawrzynczak |
2020-07-07 | lp4x: Add new memory parts and generate SPDs | David Wu |
2020-07-06 | soc/intel: Drop unused `#include <reg_script.h>` | Angel Pons |
2020-07-04 | soc/intel/tigerlake: Remove unused EHL DID from TGL SoC | Subrata Banik |
2020-07-03 | soc/intel/tigerlake: Disable hybrid storage mode in CSE Lite RO boot | Jamie Ryu |
2020-07-03 | drivers/intel/pmx_mux: Remove redundant declaration | Kyösti Mälkki |
2020-07-01 | soc/intel/tigerlake: Add platform wide _OSC capabilities for USB4 | John Zhao |
2020-06-30 | tigerlake: enable tcc_offset functionality | Sumeet R Pawnikar |
2020-06-30 | ACPI: Drop typedef global_nvs_t | Kyösti Mälkki |
2020-06-30 | soc/intel/tigerlake: Add CpuReplacementCheck to chip options | Jamie Ryu |
2020-06-30 | soc/intel/tigerlake: Avoid NULL pointer dereference | John Zhao |
2020-06-30 | src: Remove whitespaces before tabs | Elyes HAOUAS |
2020-06-29 | soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_ops | William Wei |
2020-06-25 | drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1 | Jonathan Zhang |
2020-06-24 | soc/intel/tigerlake: Fix unresolved symbol CDW1 error | John Zhao |
2020-06-22 | soc/intel/tigerlake: Add CmdMirror option in chip.h | David Wu |
2020-06-22 | mb/google/volteer: Override power limits with SKU-specific limits | Tim Wawrzynczak |
2020-06-22 | soc/intel/tigerlake: Update platform.asl to ASL2.0 syntax | V Sowmya |
2020-06-19 | soc/intel/tigerlake: Update TCSS for SW CM support | John Zhao |
2020-06-19 | tigerlake: add unique acpi device ids for dptf | Sumeet R Pawnikar |
2020-06-18 | soc/intel/tigerlake: Enable FSP-S compression | Karthikeyan Ramasubramanian |
2020-06-17 | soc/soch/intel/tigerlake: Integrate PCIe hot-plug config UPD | Wonkyu Kim |
2020-06-16 | soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS) | Kyösti Mälkki |
2020-06-16 | arch/x86: Create helper for APM_CNT SMI triggers | Kyösti Mälkki |
2020-06-14 | soc/intel/tigerlake: enable CPU_INTEL_COMMON | Alex Levin |
2020-06-12 | soc/intel/tigerlake: Add devicetree support to change PCH VR settings | Venkata Krishna Nimmagadda |
2020-06-10 | soc/intel/tigerlake: Add Hot-Plug and PME event handlers for Thunderbolt | John Zhao |
2020-06-10 | ACPI: Remove Kconfig COMMON_FADT | Kyösti Mälkki |
2020-06-09 | soc/intel/tigerlake: Set FSPS UPD ITbtConnectTopologyTimeoutInMs | John Zhao |
2020-06-09 | soc/intel/tigerlake: Increase heap size | Duncan Laurie |
2020-06-08 | spd/lp4x: Set manufacturer part name to blank (0x20) | Furquan Shaikh |
2020-06-07 | soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax | Venkata Krishna Nimmagadda |
2020-06-06 | soc/intel/tigerlake: Add CPU ID for TGL B0 | Jamie Ryu |
2020-06-06 | lp4x: Add new memory parts and generate SPDs | Furquan Shaikh |
2020-06-06 | soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.go | Furquan Shaikh |
2020-06-03 | soc/tigerlake: Fix 16-bit read/write PCI_COMMAND register | Elyes HAOUAS |
2020-06-03 | soc/intel/tigerlake: update elog to include CSME reset causes | derek.huang |
2020-06-02 | soc/intel/common/{pch,sata}: Remove SATA common code driver | Subrata Banik |
2020-06-02 | src: Remove unused 'include <bootstate.h>' | Elyes HAOUAS |
2020-06-02 | {icelake,jasperlake,skylake,tigerlake}/bootblock.c: Clean up includes | Elyes HAOUAS |
2020-06-02 | src: Remove unused '#include <cpu/x86/lapic.h>' | Elyes HAOUAS |
2020-05-31 | soc/intel/tigerlake/acpi: Update pch_hda.asl to ASL2.0 syntax | Venkata Krishna Nimmagadda |
2020-05-31 | soc/intel/tigerlake/acpi: Update camera_clock_ctl.asl to ASL2.0 | Venkata Krishna Nimmagadda |
2020-05-30 | soc/intel/tigerlake: Configure TcssDma0En and TcssDma1En | John Zhao |
2020-05-28 | soc/intel/tigerlake: Implement soc_get_pmc_mux_device() | Tim Wawrzynczak |
2020-05-28 | soc/intel/tigerlake: Generate PMC ACPI device at runtime | Tim Wawrzynczak |
2020-05-28 | soc/intel/tigerlake: Configure THC | Wonkyu Kim |
2020-05-28 | soc/intel/tigerlake: Correct GPIO community PID configuration | Eric Lai |
2020-05-28 | soc/intel/common: Improve Type16 SMBIOS tables | Patrick Rudolph |
2020-05-27 | soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code | Nico Huber |
2020-05-27 | soc/intel/gma: Move display and opregion init to common code | Nico Huber |
2020-05-27 | drivers/intel/gma: Move IGD OpRegion to CBMEM | Nico Huber |
2020-05-26 | soc/intel/tigerlake: Remove MIPI clock setting from devicetree | Srinidhi N Kaushik |
2020-05-26 | soc/intel/tigerlake: Delete unused configuration | Wonkyu Kim |
2020-05-26 | soc/intel/tigerlake: Disable VMD | Wonkyu Kim |
2020-05-26 | soc/intel/tigerlake: Add FSP UPD D3HotEnable and D3ColdEnable | John Zhao |
2020-05-26 | soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method | John Zhao |
2020-05-23 | soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value | Subrata Banik |
2020-05-22 | soc/intel/tigerlake: Provide SoundWire controller properties | Duncan Laurie |
2020-05-22 | soc/intel/tigerlake: Add definition for PMC EPOC | Duncan Laurie |
2020-05-20 | tigerlake: enable DPTF functionality for volteer | Sumeet R Pawnikar |
2020-05-20 | soc/intel/tigerlake: Add TCSS devices to soc_acpi_name() | Duncan Laurie |
2020-05-20 | soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutil | Tim Wawrzynczak |
2020-05-20 | soc/intel/tigerlake: Move PMC PCI resources under PMC device | Tim Wawrzynczak |
2020-05-20 | tigerlake: update processor power limits configuration | Sumeet R Pawnikar |
2020-05-20 | soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfg | Brandon Breitenstein |
2020-05-18 | soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En | John Zhao |
2020-05-18 | soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect override | Eric Lai |
2020-05-18 | soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method | John Zhao |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-14 | soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size() | Furquan Shaikh |
2020-05-14 | soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G | Furquan Shaikh |