| Age | Commit message (Expand) | Author |
|---|
| 2021-04-21 | soc/intel: Replace open-coded buffer length calculation | Angel Pons |
| 2021-04-21 | soc/intel: Fix typo in comment | Angel Pons |
| 2021-04-21 | soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC | Rizwan Qureshi |
| 2021-04-21 | soc/intel/tigerlake: Fix devices list in the DMAR DRHD structure | John Zhao |
| 2021-04-13 | dptf: Move platform-specific information to `struct dptf_platform_info` | Tim Wawrzynczak |
| 2021-04-06 | intel/tigerlake: Add Acoustic features | Shaunak Saha |
| 2021-03-28 | soc/intel/tigerlake: Fix REG_BASE_SIZE | Tim Wawrzynczak |
| 2021-03-28 | soc/intel/tigerlake: Move TCSS code to intel/common/block | Tim Wawrzynczak |
| 2021-03-27 | soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h | Subrata Banik |
| 2021-03-22 | soc/intel/tigerlake: Add #include guards to soc/early_tcss.h | Tim Wawrzynczak |
| 2021-03-22 | util: Add DDR4 generic SPD for H4AAG165WB-BCWE | Nick Vaccaro |
| 2021-03-19 | soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnable | Derek Huang |
| 2021-03-15 | soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI device | Cliff Huang |
| 2021-03-15 | soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry | Cliff Huang |
| 2021-03-12 | soc/intel/*: drop UART pad configuration from common code | Michael Niewöhner |
| 2021-03-05 | soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during boot | Brandon Breitenstein |
| 2021-03-05 | soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and soc | Brandon Breitenstein |
| 2021-03-05 | soc/intel/tigerlake: Fix NULL being passed for response buffer | Furquan Shaikh |
| 2021-03-03 | soc/intel: Factor out common smmrelocate.c | Angel Pons |
| 2021-03-03 | soc/intel/tigerlake: Re-use existing define in CrashLog implementation | Francois Toguo |
| 2021-03-03 | soc/intel: Retype `CnviBtAudioOffload` devicetree option | Angel Pons |
| 2021-03-01 | soc/intel: Drop `bootblock_cpu_init()` function | Angel Pons |
| 2021-03-01 | soc/intel: Drop `romstage_pch_init()` function | Angel Pons |
| 2021-03-01 | soc/intel: Factor out common smbus.h | Angel Pons |
| 2021-03-01 | soc/intel: Factor out common gpe.h | Angel Pons |
| 2021-03-01 | soc/intel: Factor out identical acpigen GPIO helpers | Angel Pons |
| 2021-03-01 | soc/intel: Include gfx.asl from northbridge | Angel Pons |
| 2021-02-24 | soc/intel/*/smmrelocate.c: Sync includes | Angel Pons |
| 2021-02-24 | soc/intel/*/smmrelocate.c: Uniformize cosmetics | Angel Pons |
| 2021-02-24 | soc/intel/*/pmutil.c: Align cosmetics across platforms | Angel Pons |
| 2021-02-24 | soc/intel/{adl,jsl,ehl,tgl}: Remove ITSS polarity restore | Aamir Bohra |
| 2021-02-23 | soc/intel/tigerlake: Remove polling for Link Active Status at resume | John Zhao |
| 2021-02-22 | soc/intel/tigerlake: Enable end of post support in FSP | Nick Vaccaro |
| 2021-02-22 | soc/intel/tigerlake: Add CrashLog implementation for intel TGL | Francois Toguo |
| 2021-02-16 | vc/google/chromeos: Always use CHROMEOS_RAMOOPS_DYNAMIC | Kyösti Mälkki |
| 2021-02-16 | ACPI: Add acpi_reset_gnvs_for_wake() | Kyösti Mälkki |
| 2021-02-16 | soc/intel: Drop aliases on MMCONF_BASE_ADDRESS | Kyösti Mälkki |
| 2021-02-15 | soc/intel: Remove unused <console/console.h> | Elyes HAOUAS |
| 2021-02-11 | src: Remove unused <arch/cpu.h> | Elyes HAOUAS |
| 2021-02-10 | soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design | Shreesh Chhabbi |
| 2021-02-09 | soc/amd,intel: Drop s3_resume parameter on FSP-S functions | Kyösti Mälkki |
| 2021-02-08 | soc/intel: Drop CID1 from GNVS | Kyösti Mälkki |
| 2021-02-06 | drivers/intel/fsp2_0: Add support for MP services2 PPI | Aamir Bohra |
| 2021-02-06 | intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI | Furquan Shaikh |
| 2021-02-06 | intel: Drop FSP_PEIM_TO_PEIM_INTERFACE | Furquan Shaikh |
| 2021-02-04 | soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 | John Zhao |
| 2021-02-03 | soc/intel/tgl: Add configurable value for ConfigTdpLevel | Derek Huang |
| 2021-02-03 | src: Remove unused <cbmem.h> | Elyes HAOUAS |
| 2021-01-31 | soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK | Michael Niewöhner |
| 2021-01-30 | soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options | Angel Pons |
| 2021-01-29 | device/Kconfig: Declare MMCONF symbols' type once | Angel Pons |
| 2021-01-28 | arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits | Kyösti Mälkki |
| 2021-01-26 | soc/intel: Move c-state resource define | Marc Jones |
| 2021-01-25 | soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroring | Michael Niewöhner |
| 2021-01-25 | soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver | Furquan Shaikh |
| 2021-01-25 | soc/intel/tigerlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD | Bora Guvendik |
| 2021-01-23 | ACPI: Add helpers for CBMEM_ID_POWER_STATE | Kyösti Mälkki |
| 2021-01-23 | ELOG: Add const qualifier for chipset_power_state | Kyösti Mälkki |
| 2021-01-20 | soc/intel/*: drop broken LPC mmio code | Michael Niewöhner |
| 2021-01-20 | ACPI GNVS: Drop most dev_count_cpu() | Kyösti Mälkki |
| 2021-01-18 | soc/intel/common: Move L1_substates_control to pcie_rp.h | Eric Lai |
| 2021-01-14 | soc/intel/tgl: Add configurable value for UsbTcPortEn | Brandon Breitenstein |
| 2021-01-13 | soc/intel/tigerlake: Disable TC cold support | Srinidhi N Kaushik |
| 2021-01-12 | soc/intel: rename uart_max_index | Michael Niewöhner |
| 2021-01-11 | soc/intel/{icl,tgl,jsl,ehl}: add LPIT support | Michael Niewöhner |
| 2021-01-11 | soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` | Furquan Shaikh |
| 2021-01-10 | soc/intel: Rename to soc_fill_gnvs() | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant ChromeOS setup for GNVS | Kyösti Mälkki |
| 2021-01-10 | ACPI: Drop redundant CONSOLE_CBMEM setup in GNVS | Kyösti Mälkki |
| 2021-01-08 | soc/intel: Drop `dev` parameter from soc_get_gen_io_dec_range() | Furquan Shaikh |
| 2021-01-08 | soc/intel/tigerlake: Enable USB2 port reset message on Type-C ports | John Zhao |
| 2020-12-30 | soc/intel/common: Move gfx.asl to drivers/intel/gma | Matt DeVillier |
| 2020-12-30 | soc/intel: hook up new gpio device in the soc chips | Michael Niewöhner |
| 2020-12-14 | src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL | Shreesh Chhabbi |
| 2020-12-14 | soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option | Shreesh Chhabbi |
| 2020-12-14 | soc/intel/tigerlake: Enable CSE Lite driver for TGL platform in romstage | Sridhar Siricilla |
| 2020-12-14 | soc/intel/tigerlake: Drop unreferenced devicetree settings | Angel Pons |
| 2020-12-10 | soc/intel/tigerlake: Check TBT & TCSS ports for wake events | Tim Wawrzynczak |
| 2020-12-10 | soc/intel/common: Adapt XHCI elog driver for reuse | Tim Wawrzynczak |
| 2020-12-09 | soc/intel/common/dmi: Move DMI defines into DMI driver header | Srinidhi N Kaushik |
| 2020-12-09 | soc/intel/tigerlake: Enable support for extended BIOS window | Furquan Shaikh |
| 2020-12-08 | src/soc/intel/tigerlake: Add SPI DMI Destination ID | Srinidhi N Kaushik |
| 2020-11-30 | soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices | Tim Wawrzynczak |
| 2020-11-30 | lp4x: Add new memory parts and generate SPDs | Nick Vaccaro |
| 2020-11-29 | soc/intel: Configure P2SB before other PCH controllers | Furquan Shaikh |
| 2020-11-22 | soc/intel/tigerlake: Fix overlapping memory address used for early GSPI2 and ... | Bora Guvendik |
| 2020-11-20 | soc/intel/tigerlake: Enable GPIO IOSTANDBY configuration | Duncan Laurie |
| 2020-11-20 | soc/intel/tigerlake: Expose UPD to enable Precision Time Measurement | Duncan Laurie |
| 2020-11-20 | soc/intel/tigerlake: Enable RTD3 driver and IPC mailbox | Duncan Laurie |
| 2020-11-20 | soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD | Michael Niewöhner |
| 2020-11-16 | lp4x: Add new memory parts and generate SPDs | David Wu |
| 2020-11-13 | soc/intel/tigerlake: Add code for early tcss | Brandon Breitenstein |
| 2020-11-11 | mb/google/volteer: Configure IA32_L3_MASK_x MSRs for L3 CQOS | Shreesh Chhabbi |
| 2020-11-11 | soc/intel/tigerlake: Update Kconfig for NEM Enhanced Mode | Shreesh Chhabbi |
| 2020-11-10 | soc/intel/tigerlake: Log PM event from an internal device | Karthikeyan Ramasubramanian |
| 2020-11-09 | soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log | Tim Wawrzynczak |
| 2020-11-09 | soc/intel/tigerlake: Utilize vbt data size Kconfig option | Srinidhi N Kaushik |
| 2020-11-09 | soc/intel/*/chip: Remove unused devicetree entry | Patrick Rudolph |
| 2020-11-05 | soc/intel/tigerlake: Disable C1 C-state Demotion | Ravi Sarawadi |
| 2020-11-03 | soc/intel/{tgl,jsl}: Enable logging of wake sources for S0ix | Furquan Shaikh |
