Age | Commit message (Expand) | Author |
2020-05-26 | soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method | John Zhao |
2020-05-23 | soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default value | Subrata Banik |
2020-05-22 | soc/intel/tigerlake: Provide SoundWire controller properties | Duncan Laurie |
2020-05-22 | soc/intel/tigerlake: Add definition for PMC EPOC | Duncan Laurie |
2020-05-20 | tigerlake: enable DPTF functionality for volteer | Sumeet R Pawnikar |
2020-05-20 | soc/intel/tigerlake: Add TCSS devices to soc_acpi_name() | Duncan Laurie |
2020-05-20 | soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutil | Tim Wawrzynczak |
2020-05-20 | soc/intel/tigerlake: Move PMC PCI resources under PMC device | Tim Wawrzynczak |
2020-05-20 | tigerlake: update processor power limits configuration | Sumeet R Pawnikar |
2020-05-20 | soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfg | Brandon Breitenstein |
2020-05-18 | soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En | John Zhao |
2020-05-18 | soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect override | Eric Lai |
2020-05-18 | soc/intel/tigerlake: Fix wrong operation region for CPU to PCH method | John Zhao |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-14 | soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size() | Furquan Shaikh |
2020-05-14 | soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G | Furquan Shaikh |
2020-05-12 | soc/intel/tigerlake: Correct IRQ interrupt | Wonkyu Kim |
2020-05-12 | device/pci_device: Extract pci_domain_set_resources from SOC | Raul E Rangel |
2020-05-12 | soc/intel/tigerlake: Control SATA and DMI power optimization | Shaunak Saha |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-11 | soc/intel/tigerlake: Update C-State info | Wonkyu Kim |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-05-08 | soc/intel: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS |
2020-05-07 | soc/intel/tigerlake: Add PMC to platform ACPI name entry | John Zhao |
2020-05-06 | treewide: replace GPLv2 long form headers with SPDX header | Patrick Georgi |
2020-05-06 | treewide: Move "is part of the coreboot project" line in its own comment | Patrick Georgi |
2020-05-06 | soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel | Shaunak Saha |
2020-05-06 | soc/intel/tigerlake: Print HPR_CAUSE0 register | derek.huang |
2020-05-05 | soc/intel/tigerlake: Add PMC mux control | John Zhao |
2020-05-04 | soc/intel/tigerlake: Update interrupt setting | Wonkyu Kim |
2020-05-04 | src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-M | Srinidhi N Kaushik |
2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
2020-05-01 | soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa... | Subrata Banik |
2020-05-01 | soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetree | Meera Ravindranath |
2020-05-01 | src: Remove unused 'include <cpu/x86/cache.h>' | Elyes HAOUAS |
2020-04-29 | soc/intel/tigerlake: Check SPD is not NULL before print | Eric Lai |
2020-04-29 | soc/intel/tigerlake: Add method to look up GPIO com ID for an index | Venkata Krishna Nimmagadda |
2020-04-28 | soc/intel/tigerlake: fix call to print_spd_info() | Nick Vaccaro |
2020-04-28 | device: Constify struct device * parameter to write_acpi_tables | Furquan Shaikh |
2020-04-25 | soc/intel/tigerlake: Fix FSP SPD index for DDR4 | Furquan Shaikh |
2020-04-24 | soc/intel/tigerlake: Add ACPI GPIO op | Alex Levin |
2020-04-22 | soc/intel/tigerlake: Configure TCSS power management | John Zhao |
2020-04-20 | soc/intel/tigerlake: Update iDisp Link UPD settings | Srinidhi N Kaushik |
2020-04-20 | soc/intel/tigerlake: Merge the recent change from other platforms | Wonkyu Kim |
2020-04-17 | soc/intel/tigerlake: Remove eMMC/SD support | Duncan Laurie |
2020-04-14 | soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope type | John Zhao |
2020-04-14 | soc/intel/tigerlake: Implement CHIPSET_LOCKDOWN | Wonkyu Kim |
2020-04-14 | soc/intel/tigerlake: Add function to dump ME firmware status information | Krishna Prasad Bhat |
2020-04-14 | soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE lib | Krishna Prasad Bhat |
2020-04-14 | soc/intel/tigerlake: Configure RP setting | Wonkyu Kim |
2020-04-13 | acpi: Bump FADT to revision 6 | Patrick Rudolph |
2020-04-13 | soc/intel/tigerlake: Remove scs.asl | Aamir Bohra |
2020-04-11 | soc/intel/tigerlake: Disable MrcSafeConfig | Srinidhi N Kaushik |
2020-04-10 | Replace DEVICE_NOOP with noop_(set|read)_resources | Nico Huber |
2020-04-10 | Drop unnecessary DEVICE_NOOP entries | Nico Huber |
2020-04-10 | soc/intel/tigerlake: Add support to initialize DDR4 Memory | Varun Joshi |
2020-04-07 | soc/intel/tigerlake/acpi: Fix typo in HDA in comment | Subrata Banik |
2020-04-07 | soc/intel/tigerlake: Allow mainboard to override DRAM part number | Marco Chen |
2020-04-06 | soc/intel/tigerlake: Use SPDX for GPL-2.0-only files | Angel Pons |
2020-04-05 | fsp2_0: Gather Kconfig declarations | Nico Huber |
2020-04-05 | soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD. | Srinidhi N Kaushik |
2020-04-02 | Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` | Nico Huber |
2020-04-02 | soc/intel/tigerlake: Add macros and SPD information for DDR4 | Furquan Shaikh |
2020-04-02 | soc/intel/tigerlake: Reorganize memory initialization support | Furquan Shaikh |
2020-04-01 | soc/intel/tigerlake: Remove Jasper Lake SoC references | Aamir Bohra |
2020-04-01 | soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC | Aamir Bohra |
2020-03-30 | soc/intel/{icelake, tigerlake}: Remove DDI A lane programming | Ronak Kanabar |
2020-03-30 | soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3 | Brandon Breitenstein |
2020-03-25 | soc/intel/tigerlake: Configure Hyperthreading | Wonkyu Kim |
2020-03-23 | soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZE | Tim Wawrzynczak |
2020-03-21 | soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper | Subrata Banik |
2020-03-20 | soc/intel: Enable GPIO functions in verstage | Bora Guvendik |
2020-03-20 | soc/intel/tigerlake: Enable ACPI support for PMC core OS driver | Venkata Krishna Nimmagadda |
2020-03-19 | soc/intel/tigerlake: add support to read SPD data from SMBus | Ronak Kanabar |
2020-03-19 | soc/intel/tigerlake: Update header to avoid compilation issue | Maulik V Vaghela |
2020-03-18 | soc/intel/tigerlake: Correct number of gpio group for Jasper Lake | Maulik V Vaghela |
2020-03-18 | soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT | Brandon Breitenstein |
2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
2020-03-17 | src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASL | Rizwan Qureshi |
2020-03-16 | soc/intel/tigerlake: Support ISH | li feng |
2020-03-16 | src/soc/tigerlake_dev: Update PMC IPC Hardware ID | John Zhao |
2020-03-15 | soc/intel/tigerlake: Match RP number with TGL EDS | Wonkyu Kim |
2020-03-15 | soc/intel/tigerlake: Enable CNVi through dev_enabled | Srinidhi N Kaushik |
2020-03-15 | soc/intel/tigerlake: Update Cpu Ratio settings | Srinidhi N Kaushik |
2020-03-15 | soc/intel/tigerlake: Configure Vmx support using Kconfig | John Zhao |
2020-03-12 | soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI table | John Zhao |
2020-03-12 | soc/intel/*/smihandler: Only compile in TCO SMI handler if needed | Patrick Georgi |
2020-03-12 | soc/intel/tigerlake: Configure L1Substates for PCH Root ports | Wonkyu Kim |
2020-03-12 | soc/intel/tigerlake: Enable HDA through dev_enabled | Srinidhi N Kaushik |
2020-03-11 | soc/intel/tigerlake: Save DIMM info by available nodes | Jamie Ryu |
2020-03-11 | soc/intel/tigerlake: Correct FSP log interface | Ronak Kanabar |
2020-03-11 | soc/intel/tigerlake: Fix stale device pointer usage | Karthikeyan Ramasubramanian |
2020-03-10 | soc/intel: fix eist enabling | Matt Delco |
2020-03-10 | soc/intel/tigerlake: Enable Hybrid storage mode | Wonkyu Kim |
2020-03-07 | soc/intel/tigerlake: Avoid NULL pointer dereference | John Zhao |
2020-03-07 | intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers | Michael Niewöhner |
2020-03-07 | intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected | Michael Niewöhner |
2020-03-06 | soc/intel/tigerlake: Enable CNVi Mode | Srinidhi N Kaushik |
2020-03-06 | soc/intel/tigerlake: Avoid NULL pointer dereference | John Zhao |
2020-03-04 | src: capitalize 'PCIe' | Elyes HAOUAS |