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path: root/src/soc/intel/tigerlake
AgeCommit message (Expand)Author
2021-11-08soc/intel: drop Kconfig `PM_ACPI_TIMER_OPTIONAL`Michael Niewöhner
2021-10-26soc/intel: Update api name for getting spi destination idWonkyu Kim
2021-10-26cpu/x86: Introduce and use `CPU_X86_LAPIC`Felix Held
2021-10-25cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCsFelix Held
2021-10-22arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki
2021-10-22cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held
2021-10-21cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held
2021-10-19soc/intel: Constify `soc_get_cstate_map()`Angel Pons
2021-10-19soc/intel/*/acpi.c: Don't copy structs with `memcpy()`Angel Pons
2021-10-18intel/tigerlake: Add missing IRQ for CNViSean Rhodes
2021-10-17soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner
2021-10-17soc/intel: implement ACPI timer disabling per SoC and drop common codeMichael Niewöhner
2021-10-17soc/intel: move disabling of PM Timer to SoC PMC codeMichael Niewöhner
2021-10-17soc/intel: deduplicate acpi_fill_soc_wakeMichael Niewöhner
2021-10-12soc/intel: replace dt option PmTimerDisabled by KconfigMichael Niewöhner
2021-10-12soc/intel/*/cpu.c: Add missing space in commentAngel Pons
2021-10-11soc/intel/tigerlake: Add ACPI addition for USB4/TBT latency optimizationJohn Zhao
2021-10-07soc/intel/tigerlake: Hook up GMA ACPI brightness controlsTim Crawford
2021-10-05src/soc to src/superio: Fix spelling errorsMartin Roth
2021-10-01soc/tigerlake: Make IO decode / enable register configurableSean Rhodes
2021-09-29soc/intel: Drop unnecessary `select REG_SCRIPT`Angel Pons
2021-09-29soc/intel/{cnl,jsl,tgl,ehl,adl}: rename PMC device init/enable callbacksMichael Niewöhner
2021-09-23soc/intel/tgl: correct wrong gpio GPI enable register base offsetMichael Niewöhner
2021-09-23soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registersMichael Niewöhner
2021-09-23mb/google/volteer: Migrate volteer to use SPD files under spd/Reka Norman
2021-09-20soc/intel/tigerlake: Clear RTC_BATTERY_DEADTim Wawrzynczak
2021-09-20soc/intel/{common,tgl,adl}: guard TME Kconfig option by SoC supportMichael Niewöhner
2021-09-16drivers/intel/fsp2_0: Refactor MultiPhaseSiInit API calling methodSubrata Banik
2021-09-13soc/intel/tgl: Enable USB4 resources based on common KconfigFurquan Shaikh
2021-09-10soc/intel/tigerlake: Switch to runtime generation of Intel Power EngineTim Wawrzynczak
2021-09-10soc/intel/tigerlake: Move LPM functions to new fileTim Wawrzynczak
2021-09-08cpu/x86/tsc: Deduplicate Makefile logicAngel Pons
2021-09-02soc/intel/tigerlake: Set MAX_CPUS for TGL-H to 16Tim Crawford
2021-08-26soc/intel/tigerlake: Lock PAM registers in finalizeTim Wawrzynczak
2021-08-25soc/intel/tigerlake: Hook up ucode for TGL-HTim Crawford
2021-08-24soc/intel/tigerlake: Add USB ACPI devices for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add SPI_DMI_DESTINATION_ID for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Set UserBd to recommended default for PCH-HJeremy Soller
2021-08-24soc/intel/tgl: Add PCR_PSF3_T0_SHDW_PMC_REG_BASE for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add TGL-H PEG portsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCIe root ports for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H GPIO definitionsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H PMC GPE group definitionsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H chipset devicetreeJeremy Soller
2021-08-24soc/intel/tigerlake: Add TGL-H power limitsJeremy Soller
2021-08-24soc/intel: Add TGL-H CPUIDJeremy Soller
2021-08-19soc/intel/common: Add TGL-H PCI IDsJeremy Soller
2021-08-16mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cbMAULIK V VAGHELA
2021-08-15soc/intel/tigerlake: Select SF_MASK_2WAYS_PER_BIT if eNEM is enableSubrata Banik
2021-08-13soc/intel/tgl: Hook up ucode for TGL-U and TGL-RTim Crawford
2021-08-12soc/intel/tigerlake: Clean up FSP chipset lockdown configurationFelix Singer
2021-08-12soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-STim Crawford
2021-08-04Move post_codes.h to commonlib/console/Ricardo Quesada
2021-08-03soc/intel/*: Allow configuring 8254 timer via CMOSSean Rhodes
2021-07-26src/*: Specify type of `CBFS_SIZE` onceAngel Pons
2021-07-19soc/intel/common: Rename kconfig PMC_EPOCLean Sheng Tan
2021-07-17soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik
2021-07-15soc/intel/tigerlake: Use `is_devfn_enabled()` for Crashlog UPDsSubrata Banik
2021-07-02src: Introduce `ARCH_ALL_STAGES_X86`Angel Pons
2021-07-01soc/intel: Refactor `xdci_can_enable()` functionAngel Pons
2021-06-30soc/intel/tigerlake: Send End-of-Post message to CSETim Wawrzynczak
2021-06-30soc/intel/common: Move PMC EPOC related code to Intel common codeLean Sheng Tan
2021-06-30src: Move `select ARCH_X86` to platformsAngel Pons
2021-06-29soc/intel/tigerlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-28soc/intel: Drop casts around `soc_read_pmc_base()`Angel Pons
2021-06-23soc/intel/tigerlake: Use devfn_disable() function for XDCISubrata Banik
2021-06-17soc/intel/{alderlake,tigerlake}: Fix typo in pmc.hWerner Zeh
2021-06-16soc/intel/tigerlake: Make use of is_devfn_enabled() functionSubrata Banik
2021-06-14util: Add DDR4 generic SPD for MT40A512M16TB-062E:RWisley Chen
2021-06-10soc/intel/tigerlake: Move MAX_CPUS to KconfigAndy Pont
2021-06-10soc/intel/tigerlake: Hook up FSP repositoryFelix Singer
2021-06-07cpu/x86: Default to PARALLEL_MP selectedKyösti Mälkki
2021-06-07soc/intel: Drop unused lpss functionsFurquan Shaikh
2021-05-27soc/intel/tigerlake: Return TBT PowerResource from PR0 and PR3John Zhao
2021-05-26soc/intel/tigerlake: Add validity for TBT firmware authenticationJohn Zhao
2021-05-18cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=yArthur Heymans
2021-05-14soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OCNick Vaccaro
2021-05-13src: Match array format in function declarations and definitionsPatrick Georgi
2021-05-07soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXITKane Chen
2021-05-07soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmasterKane Chen
2021-05-06soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias padsTim Wawrzynczak
2021-05-06soc/intel/tigkerlake: Add IOM PCR PIDTim Wawrzynczak
2021-05-06soc/intel/tigerlake: Add known CPU Port IDs for GPIO communitiesTim Wawrzynczak
2021-05-06soc/intel/tigerlake: Add known GPIO virtual wire informationTim Wawrzynczak
2021-05-03soc/intel/*: Update data types for variables holding PCH_DEVFN_* macrosTim Wawrzynczak
2021-05-03device: Switch pci_dev_is_wake_source to take pci_devfn_tTim Wawrzynczak
2021-04-26soc/intel/tigerlake: Use device ID from pci_devs header fileJohn Zhao
2021-04-21soc/intel: Replace open-coded buffer length calculationAngel Pons
2021-04-21soc/intel: Fix typo in commentAngel Pons
2021-04-21soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRCRizwan Qureshi
2021-04-21soc/intel/tigerlake: Fix devices list in the DMAR DRHD structureJohn Zhao
2021-04-13dptf: Move platform-specific information to `struct dptf_platform_info`Tim Wawrzynczak
2021-04-06intel/tigerlake: Add Acoustic featuresShaunak Saha
2021-03-28soc/intel/tigerlake: Fix REG_BASE_SIZETim Wawrzynczak
2021-03-28soc/intel/tigerlake: Move TCSS code to intel/common/blockTim Wawrzynczak
2021-03-27soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik
2021-03-22soc/intel/tigerlake: Add #include guards to soc/early_tcss.hTim Wawrzynczak
2021-03-22util: Add DDR4 generic SPD for H4AAG165WB-BCWENick Vaccaro
2021-03-19soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnableDerek Huang
2021-03-15soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang