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path: root/src/soc/intel/tigerlake
AgeCommit message (Expand)Author
2020-05-23soc/intel/{jsl,tgl}: Override PRERAM_CBMEM_CONSOLE_SIZE default valueSubrata Banik
2020-05-22soc/intel/tigerlake: Provide SoundWire controller propertiesDuncan Laurie
2020-05-22soc/intel/tigerlake: Add definition for PMC EPOCDuncan Laurie
2020-05-20tigerlake: enable DPTF functionality for volteerSumeet R Pawnikar
2020-05-20soc/intel/tigerlake: Add TCSS devices to soc_acpi_name()Duncan Laurie
2020-05-20soc/intel/tigerlake: Move pmc_soc_set_afterg3_en to pmutilTim Wawrzynczak
2020-05-20soc/intel/tigerlake: Move PMC PCI resources under PMC deviceTim Wawrzynczak
2020-05-20tigerlake: update processor power limits configurationSumeet R Pawnikar
2020-05-20soc/tigerlake: Add devicetree configurability for IomTypeCPortPadCfgBrandon Breitenstein
2020-05-18soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1EnJohn Zhao
2020-05-18soc/intel/tigerlake: Add PchHdaIDispCodecDisconnect overrideEric Lai
2020-05-18soc/intel/tigerlake: Fix wrong operation region for CPU to PCH methodJohn Zhao
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-14soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh
2020-05-14soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh
2020-05-12soc/intel/tigerlake: Correct IRQ interruptWonkyu Kim
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-12soc/intel/tigerlake: Control SATA and DMI power optimizationShaunak Saha
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-11soc/intel/tigerlake: Update C-State infoWonkyu Kim
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-08soc/intel: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-07soc/intel/tigerlake: Add PMC to platform ACPI name entryJohn Zhao
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-05-06soc/intel/tigerlake: Print HPR_CAUSE0 registerderek.huang
2020-05-05soc/intel/tigerlake: Add PMC mux controlJohn Zhao
2020-05-04soc/intel/tigerlake: Update interrupt settingWonkyu Kim
2020-05-04src/soc/tigerlake: Update SerialIoDebugMode UPD in FSP-MSrinidhi N Kaushik
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-05-01soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understa...Subrata Banik
2020-05-01soc/intel/tigerlake: Fill PcieRpClkReqDetect from devicetreeMeera Ravindranath
2020-05-01src: Remove unused 'include <cpu/x86/cache.h>'Elyes HAOUAS
2020-04-29soc/intel/tigerlake: Check SPD is not NULL before printEric Lai
2020-04-29soc/intel/tigerlake: Add method to look up GPIO com ID for an indexVenkata Krishna Nimmagadda
2020-04-28soc/intel/tigerlake: fix call to print_spd_info()Nick Vaccaro
2020-04-28device: Constify struct device * parameter to write_acpi_tablesFurquan Shaikh
2020-04-25soc/intel/tigerlake: Fix FSP SPD index for DDR4Furquan Shaikh
2020-04-24soc/intel/tigerlake: Add ACPI GPIO opAlex Levin
2020-04-22soc/intel/tigerlake: Configure TCSS power managementJohn Zhao
2020-04-20soc/intel/tigerlake: Update iDisp Link UPD settingsSrinidhi N Kaushik
2020-04-20soc/intel/tigerlake: Merge the recent change from other platformsWonkyu Kim
2020-04-17soc/intel/tigerlake: Remove eMMC/SD supportDuncan Laurie
2020-04-14soc/intel/tigerlake: Fix TCSS TBT PCIE root ports scope typeJohn Zhao
2020-04-14soc/intel/tigerlake: Implement CHIPSET_LOCKDOWNWonkyu Kim
2020-04-14soc/intel/tigerlake: Add function to dump ME firmware status informationKrishna Prasad Bhat
2020-04-14soc/intel/{icl,tgl}: Make use of print_me_fw_version() from CSE libKrishna Prasad Bhat
2020-04-14soc/intel/tigerlake: Configure RP settingWonkyu Kim
2020-04-13acpi: Bump FADT to revision 6Patrick Rudolph
2020-04-13soc/intel/tigerlake: Remove scs.aslAamir Bohra
2020-04-11soc/intel/tigerlake: Disable MrcSafeConfigSrinidhi N Kaushik
2020-04-10Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber
2020-04-10Drop unnecessary DEVICE_NOOP entriesNico Huber
2020-04-10soc/intel/tigerlake: Add support to initialize DDR4 MemoryVarun Joshi
2020-04-07soc/intel/tigerlake/acpi: Fix typo in HDA in commentSubrata Banik
2020-04-07soc/intel/tigerlake: Allow mainboard to override DRAM part numberMarco Chen
2020-04-06soc/intel/tigerlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-05fsp2_0: Gather Kconfig declarationsNico Huber
2020-04-05soc/intel/tigerlake: Replace Reserved9 usage with DisableDimmCh# UPD.Srinidhi N Kaushik
2020-04-02Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator`Nico Huber
2020-04-02soc/intel/tigerlake: Add macros and SPD information for DDR4Furquan Shaikh
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-04-01soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoCAamir Bohra
2020-03-30soc/intel/{icelake, tigerlake}: Remove DDI A lane programmingRonak Kanabar
2020-03-30soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3Brandon Breitenstein
2020-03-25soc/intel/tigerlake: Configure HyperthreadingWonkyu Kim
2020-03-23soc/intel/tigerlake: Update DCACHE_BSP_STACK_SIZETim Wawrzynczak
2020-03-21soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition properSubrata Banik
2020-03-20soc/intel: Enable GPIO functions in verstageBora Guvendik
2020-03-20soc/intel/tigerlake: Enable ACPI support for PMC core OS driverVenkata Krishna Nimmagadda
2020-03-19soc/intel/tigerlake: add support to read SPD data from SMBusRonak Kanabar
2020-03-19soc/intel/tigerlake: Update header to avoid compilation issueMaulik V Vaghela
2020-03-18soc/intel/tigerlake: Correct number of gpio group for Jasper LakeMaulik V Vaghela
2020-03-18soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBTBrandon Breitenstein
2020-03-18soc: Remove copyright noticesPatrick Georgi
2020-03-17src/soc/intel/tigerlake: Fix incorrect use of Field objects in ASLRizwan Qureshi
2020-03-16soc/intel/tigerlake: Support ISHli feng
2020-03-16src/soc/tigerlake_dev: Update PMC IPC Hardware IDJohn Zhao
2020-03-15soc/intel/tigerlake: Match RP number with TGL EDSWonkyu Kim
2020-03-15soc/intel/tigerlake: Enable CNVi through dev_enabledSrinidhi N Kaushik
2020-03-15soc/intel/tigerlake: Update Cpu Ratio settingsSrinidhi N Kaushik
2020-03-15soc/intel/tigerlake: Configure Vmx support using KconfigJohn Zhao
2020-03-12soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI tableJohn Zhao
2020-03-12soc/intel/*/smihandler: Only compile in TCO SMI handler if neededPatrick Georgi
2020-03-12soc/intel/tigerlake: Configure L1Substates for PCH Root portsWonkyu Kim
2020-03-12soc/intel/tigerlake: Enable HDA through dev_enabledSrinidhi N Kaushik
2020-03-11soc/intel/tigerlake: Save DIMM info by available nodesJamie Ryu
2020-03-11soc/intel/tigerlake: Correct FSP log interfaceRonak Kanabar
2020-03-11soc/intel/tigerlake: Fix stale device pointer usageKarthikeyan Ramasubramanian
2020-03-10soc/intel: fix eist enablingMatt Delco
2020-03-10soc/intel/tigerlake: Enable Hybrid storage modeWonkyu Kim
2020-03-07soc/intel/tigerlake: Avoid NULL pointer dereferenceJohn Zhao
2020-03-07intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registersMichael Niewöhner
2020-03-07intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selectedMichael Niewöhner
2020-03-06soc/intel/tigerlake: Enable CNVi ModeSrinidhi N Kaushik
2020-03-06soc/intel/tigerlake: Avoid NULL pointer dereferenceJohn Zhao
2020-03-04src: capitalize 'PCIe'Elyes HAOUAS
2020-03-04soc/intel/tigerlake: Update SerialIoUart settings for Tiger LakeSrinidhi N Kaushik