coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2020-12-10	soc/intel/common: Adapt XHCI elog driver for reuse	Tim Wawrzynczak
	Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS or North XHCI block has a similar enough PCI MMIO structure to make this code mostly reusable. 1) Rename everything to drop the `pch_` prefix 2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI controller 3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI controller BUG=b:172279037 TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via EC; type on keyboard, verify it wakes up, eventlog contains: 39 \| 2020-12-10 09:40:21 \| S0ix Enter 40 \| 2020-12-10 09:40:42 \| S0ix Exit 41 \| 2020-12-10 09:40:42 \| Wake Source \| PME - XHCI (USB 2.0 port) \| 1 42 \| 2020-12-10 09:40:42 \| Wake Source \| GPE # \| 109 which verifies it still functions for the PCH XHCI controller Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-10	soc/intel/tigerlake: Log PM event from an internal device	Karthikeyan Ramasubramanian
	Add support to check for the Power Management (PM) Status bit for various internal devices like USB, CNVi etc. and log them into the event log for debugging purposes. BUG=b:172279037 BRANCH=volteer Change-Id: Ib3d0bf33d780444f8240f749a3319212c985950d Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47227 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>