| Age | Commit message (Expand) | Author |
|---|
| 2022-12-10 | soc/intel: Move TCSS FW latency macros to IA common tcss.h | Subrata Banik |
| 2022-12-10 | soc/intel/tigerlake: Move TCSS FW latency macros to tcss.h | Subrata Banik |
| 2022-08-10 | soc/intel/tigerlake: Add USBOTG and CrashLog to irq table | Frans Hendriks |
| 2022-05-25 | soc/intel/tigerlake: Drop unused `PCH_DEV_SLOT_LPC` macro | Subrata Banik |
| 2022-05-16 | soc/intel/*: Fix up header guards | Arthur Heymans |
| 2022-05-16 | soc/inte/*/gpio; Add GPE_EN and GPE_STS register definition | Maulik V Vaghela |
| 2022-03-29 | soc/intel: Move `pmc_clear_pmcon_sts()` into IA common code | Subrata Banik |
| 2022-03-15 | {mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype | Subrata Banik |
| 2022-02-25 | arch/x86: factor out and commonize HPET_BASE_ADDRESS definition | Felix Held |
| 2022-01-19 | soc/intel/common/cpu: Use SoC overrides to get CPU privilege level | Subrata Banik |
| 2022-01-02 | soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_mode | Subrata Banik |
| 2022-01-01 | src: Drop duplicated includes | Elyes HAOUAS |
| 2021-10-26 | soc/intel: Update api name for getting spi destination id | Wonkyu Kim |
| 2021-09-23 | soc/intel/tgl: correct wrong gpio GPI enable register base offset | Michael Niewöhner |
| 2021-09-23 | soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers | Michael Niewöhner |
| 2021-09-10 | soc/intel/tigerlake: Move LPM functions to new file | Tim Wawrzynczak |
| 2021-08-24 | soc/intel/tigerlake: Add SPI_DMI_DESTINATION_ID for PCH-H | Jeremy Soller |
| 2021-08-24 | soc/intel/tigerlake: Add TGL-H PEG ports | Jeremy Soller |
| 2021-08-24 | soc/intel/tigerlake: Add PCIe root ports for PCH-H | Jeremy Soller |
| 2021-08-24 | soc/intel/tigerlake: Add PCH-H GPIO definitions | Jeremy Soller |
| 2021-08-24 | soc/intel/tigerlake: Add PCH-H PMC GPE group definitions | Jeremy Soller |
| 2021-06-30 | soc/intel/common: Move PMC EPOC related code to Intel common code | Lean Sheng Tan |
| 2021-06-29 | soc/intel/tigerlake: Enable support for common IRQ block | Tim Wawrzynczak |
| 2021-06-17 | soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h | Werner Zeh |
| 2021-05-26 | soc/intel/tigerlake: Add validity for TBT firmware authentication | John Zhao |
| 2021-05-14 | soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC | Nick Vaccaro |
| 2021-05-06 | soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias pads | Tim Wawrzynczak |
| 2021-05-06 | soc/intel/tigkerlake: Add IOM PCR PID | Tim Wawrzynczak |
| 2021-05-06 | soc/intel/tigerlake: Add known CPU Port IDs for GPIO communities | Tim Wawrzynczak |
| 2021-03-28 | soc/intel/tigerlake: Fix REG_BASE_SIZE | Tim Wawrzynczak |
| 2021-03-28 | soc/intel/tigerlake: Move TCSS code to intel/common/block | Tim Wawrzynczak |
| 2021-03-27 | soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h | Subrata Banik |
| 2021-03-22 | soc/intel/tigerlake: Add #include guards to soc/early_tcss.h | Tim Wawrzynczak |
| 2021-03-15 | soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI device | Cliff Huang |
| 2021-03-05 | soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during boot | Brandon Breitenstein |
| 2021-03-05 | soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and soc | Brandon Breitenstein |
| 2021-03-01 | soc/intel: Drop `bootblock_cpu_init()` function | Angel Pons |
| 2021-03-01 | soc/intel: Drop `romstage_pch_init()` function | Angel Pons |
| 2021-03-01 | soc/intel: Factor out common smbus.h | Angel Pons |
| 2021-03-01 | soc/intel: Factor out common gpe.h | Angel Pons |
| 2021-02-22 | soc/intel/tigerlake: Add CrashLog implementation for intel TGL | Francois Toguo |
| 2021-02-16 | soc/intel: Drop aliases on MMCONF_BASE_ADDRESS | Kyösti Mälkki |
| 2021-01-25 | soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver | Furquan Shaikh |
| 2021-01-11 | soc/intel/{icl,tgl,jsl,ehl}: add LPIT support | Michael Niewöhner |
| 2021-01-08 | soc/intel/tigerlake: Enable USB2 port reset message on Type-C ports | John Zhao |
| 2020-12-08 | src/soc/intel/tigerlake: Add SPI DMI Destination ID | Srinidhi N Kaushik |
| 2020-11-30 | soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices | Tim Wawrzynczak |
| 2020-11-13 | soc/intel/tigerlake: Add code for early tcss | Brandon Breitenstein |
| 2020-10-24 | {cpu,soc}/intel: deduplicate cpu code | Michael Niewöhner |
| 2020-10-21 | soc/intel: convert XTAL frequency constant to Kconfig | Michael Niewöhner |
| 2020-10-05 | soc: move mainboard_get_dram_part_num prototype to memory_info.h | Nick Vaccaro |
| 2020-10-05 | mb, soc: change mainboard_get_dram_part_num() prototype | Nick Vaccaro |
| 2020-10-03 | soc/intel: Make use of PMC low power program from common block | Subrata Banik |
| 2020-09-25 | soc/intel/tigerlake: Remove extra '_' from GPIO PIN name | Subrata Banik |
| 2020-09-21 | src/soc/intel: Drop unneeded empty lines | Elyes HAOUAS |
| 2020-09-11 | soc/intel/tigerlake: Clean up systemagent.h | Subrata Banik |
| 2020-09-10 | soc/intel/tigerlake: Maintain consistent tab in iomap.h | Subrata Banik |
| 2020-09-04 | soc/intel/tigerlake: Remove unused PID_SDX macro | Subrata Banik |
| 2020-09-02 | soc/intel/tigerlake: Add mainboard hook for overriding SoC config | Jes Klinke |
| 2020-08-26 | soc/intel/tigerlake: Rename pch_init() code | Alexey Buyanov |
| 2020-08-12 | soc/intel/tigerlake: Add IRQs for LPSS uart | Patrick Rudolph |
| 2020-08-09 | soc/intel/{icl.tgl,jsl}: Remove SMRAM register programming | Aamir Bohra |
| 2020-08-06 | soc/intel/tigerlake: add common routine for DDR init | Nick Vaccaro |
| 2020-07-29 | soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dB | Duncan Laurie |
| 2020-07-26 | soc/intel/tigerlake: Disable CPU PCIe in FSP | Shaunak Saha |
| 2020-07-26 | src: Remove extra lines in license header | Elyes HAOUAS |
| 2020-07-25 | soc/intel/tigerlake: Update Pkg C-State latencies | Ravi Sarawadi |
| 2020-07-14 | src: Remove unused 'include <stdint.h> | Elyes HAOUAS |
| 2020-07-12 | soc/intel/tigerlake: Add Type-C IOM base address and size macro | John Zhao |
| 2020-07-07 | soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master | John Zhao |
| 2020-05-26 | soc/intel/tigerlake: Disable VMD | Wonkyu Kim |
| 2020-05-22 | soc/intel/tigerlake: Add definition for PMC EPOC | Duncan Laurie |
| 2020-05-20 | soc/intel/tigerlake: Move PMC PCI resources under PMC device | Tim Wawrzynczak |
| 2020-05-20 | tigerlake: update processor power limits configuration | Sumeet R Pawnikar |
| 2020-05-18 | soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En | John Zhao |
| 2020-05-14 | soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size() | Furquan Shaikh |
| 2020-05-14 | soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4G | Furquan Shaikh |
| 2020-05-12 | soc/intel/tigerlake: Correct IRQ interrupt | Wonkyu Kim |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-11 | soc/intel/tigerlake: Update C-State info | Wonkyu Kim |
| 2020-05-06 | soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel | Shaunak Saha |
| 2020-05-06 | soc/intel/tigerlake: Print HPR_CAUSE0 register | derek.huang |
| 2020-05-04 | soc/intel/tigerlake: Update interrupt setting | Wonkyu Kim |
| 2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
| 2020-04-17 | soc/intel/tigerlake: Remove eMMC/SD support | Duncan Laurie |
| 2020-04-10 | soc/intel/tigerlake: Add support to initialize DDR4 Memory | Varun Joshi |
| 2020-04-07 | soc/intel/tigerlake: Allow mainboard to override DRAM part number | Marco Chen |
| 2020-04-06 | soc/intel/tigerlake: Use SPDX for GPL-2.0-only files | Angel Pons |
| 2020-04-02 | soc/intel/tigerlake: Add macros and SPD information for DDR4 | Furquan Shaikh |
| 2020-04-02 | soc/intel/tigerlake: Reorganize memory initialization support | Furquan Shaikh |
| 2020-04-01 | soc/intel/tigerlake: Remove Jasper Lake SoC references | Aamir Bohra |
| 2020-03-21 | soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition proper | Subrata Banik |
| 2020-03-19 | soc/intel/tigerlake: add support to read SPD data from SMBus | Ronak Kanabar |
| 2020-03-19 | soc/intel/tigerlake: Update header to avoid compilation issue | Maulik V Vaghela |
| 2020-03-18 | soc/intel/tigerlake: Correct number of gpio group for Jasper Lake | Maulik V Vaghela |
| 2020-03-18 | soc: Remove copyright notices | Patrick Georgi |
| 2020-03-12 | soc/intel/tigerlake: Enable VT-d and generate DMAR ACPI table | John Zhao |
| 2020-03-07 | intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers | Michael Niewöhner |
| 2020-03-07 | intel/soc: skl,apl,cnl,icl,tgl,common: enable TCO SMIs if selected | Michael Niewöhner |
| 2020-03-03 | soc/intel/tigerlake: Add Jasper lake GPIO support | Ronak Kanabar |
