aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/tigerlake/include
AgeCommit message (Expand)Author
2020-02-19soc/tigerlake: Add IRQ header and ACPI support for JSPMeera Ravindranath
2020-02-17src/intel: Define HFSTS3 registerSridhar Siricilla
2020-02-17src/soc/tigerlake: Accomodate JSP specific changes in iomap.hMeera Ravindranath
2020-02-09soc/intel/tigerlake: add memory configuration supportNick Vaccaro
2020-02-09soc/intel/{common,skl,cnl,icl,apl,tgl}: Move HFSTS1 register definition to SoCSridhar Siricilla
2020-02-04soc/intel: Add get_pmbaseEugene Myers
2020-01-25soc/intel/tigerlake: Fix GPIO communitiesShaunak Saha
2020-01-22soc/intel/tigerlake: Update GPIO configRavi Sarawadi
2020-01-22soc/intel/tigerlake: Update interrupt infoWonkyu Kim
2020-01-18soc/intel/tigerlake: Update pci dev definitionWonkyu Kim
2020-01-15soc/intel/tigerlake: Update header filesRavi Sarawadi
2020-01-10soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource properSubrata Banik
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2019-12-16soc/intel/tigerlake: Pick correct pmc base reg from pch typeMaulik V Vaghela
2019-11-22intel/smm: Provide common smm_relocation_paramsKyösti Mälkki
2019-11-15soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()Subrata Banik
2019-11-09soc/intel/tigerlake: Do initial SoC commit till ramstageSubrata Banik
2019-11-09soc/intel/tigerlake/romstage: Do initial SoC commit till romstageSubrata Banik
2019-11-09soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblockSubrata Banik