coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-01-25	soc/intel/tigerlake: Fix GPIO communities	Shaunak Saha
2020-01-22	soc/intel/tigerlake: Update GPIO config	Ravi Sarawadi
2020-01-22	soc/intel/tigerlake: Update interrupt info	Wonkyu Kim
2020-01-18	soc/intel/tigerlake: Update pci dev definition	Wonkyu Kim
2020-01-15	soc/intel/tigerlake: Update header files	Ravi Sarawadi
2020-01-10	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	Subrata Banik
2020-01-09	sb/intel/common: Add smbus_set_slave_addr()	Kyösti Mälkki
2019-12-16	soc/intel/tigerlake: Pick correct pmc base reg from pch type	Maulik V Vaghela
2019-11-22	intel/smm: Provide common smm_relocation_params	Kyösti Mälkki
2019-11-15	soc/intel/{icl,tgl}: Rename pch_early_init() to pch_init()	Subrata Banik
2019-11-09	soc/intel/tigerlake: Do initial SoC commit till ramstage	Subrata Banik
2019-11-09	soc/intel/tigerlake/romstage: Do initial SoC commit till romstage	Subrata Banik
2019-11-09	soc/intel/tigerlake/bootblock: Do initial SoC commit till bootblock	Subrata Banik