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path: root/src/soc/intel/tigerlake/include
AgeCommit message (Expand)Author
2024-07-18soc/intel/tigerlake: Switch to common eSPI headerSubrata Banik
2023-09-01soc/intel/{adl,jsl,mtl,tgl}: Add ACPI name for GNA deviceMatt DeVillier
2023-02-24soc/intel/tgl: Select CSE defined ME spec version for tigerlakeDinesh Gehlot
2023-02-04soc/intel/tgl: Move ME FSR structures to pertinent headerDinesh Gehlot
2023-01-20soc/intel/*/include/soc/gpio.h: Add "IWYU pragma: export" commentElyes Haouas
2023-01-20soc/intel: Remove unused <stddef.h>Elyes Haouas
2023-01-11soc/intel/{alderlake,tigerlake}: Fix typo in gpio_defs.hJakub Czapiga
2022-12-22soc/intel/tigerlake: Move DPTF ACPI Device IDs into header fileSubrata Banik
2022-12-10soc/intel: Move TCSS FW latency macros to IA common tcss.hSubrata Banik
2022-12-10soc/intel/tigerlake: Move TCSS FW latency macros to tcss.hSubrata Banik
2022-08-10soc/intel/tigerlake: Add USBOTG and CrashLog to irq tableFrans Hendriks
2022-05-25soc/intel/tigerlake: Drop unused `PCH_DEV_SLOT_LPC` macroSubrata Banik
2022-05-16soc/intel/*: Fix up header guardsArthur Heymans
2022-05-16soc/inte/*/gpio; Add GPE_EN and GPE_STS register definitionMaulik V Vaghela
2022-03-29soc/intel: Move `pmc_clear_pmcon_sts()` into IA common codeSubrata Banik
2022-03-15{mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototypeSubrata Banik
2022-02-25arch/x86: factor out and commonize HPET_BASE_ADDRESS definitionFelix Held
2022-01-19soc/intel/common/cpu: Use SoC overrides to get CPU privilege levelSubrata Banik
2022-01-02soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_modeSubrata Banik
2022-01-01src: Drop duplicated includesElyes HAOUAS
2021-10-26soc/intel: Update api name for getting spi destination idWonkyu Kim
2021-09-23soc/intel/tgl: correct wrong gpio GPI enable register base offsetMichael Niewöhner
2021-09-23soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registersMichael Niewöhner
2021-09-10soc/intel/tigerlake: Move LPM functions to new fileTim Wawrzynczak
2021-08-24soc/intel/tigerlake: Add SPI_DMI_DESTINATION_ID for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add TGL-H PEG portsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCIe root ports for PCH-HJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H GPIO definitionsJeremy Soller
2021-08-24soc/intel/tigerlake: Add PCH-H PMC GPE group definitionsJeremy Soller
2021-06-30soc/intel/common: Move PMC EPOC related code to Intel common codeLean Sheng Tan
2021-06-29soc/intel/tigerlake: Enable support for common IRQ blockTim Wawrzynczak
2021-06-17soc/intel/{alderlake,tigerlake}: Fix typo in pmc.hWerner Zeh
2021-05-26soc/intel/tigerlake: Add validity for TBT firmware authenticationJohn Zhao
2021-05-14soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OCNick Vaccaro
2021-05-06soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias padsTim Wawrzynczak
2021-05-06soc/intel/tigkerlake: Add IOM PCR PIDTim Wawrzynczak
2021-05-06soc/intel/tigerlake: Add known CPU Port IDs for GPIO communitiesTim Wawrzynczak
2021-03-28soc/intel/tigerlake: Fix REG_BASE_SIZETim Wawrzynczak
2021-03-28soc/intel/tigerlake: Move TCSS code to intel/common/blockTim Wawrzynczak
2021-03-27soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik
2021-03-22soc/intel/tigerlake: Add #include guards to soc/early_tcss.hTim Wawrzynczak
2021-03-15soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang
2021-03-05soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during bootBrandon Breitenstein
2021-03-05soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and socBrandon Breitenstein
2021-03-01soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons
2021-03-01soc/intel: Drop `romstage_pch_init()` functionAngel Pons
2021-03-01soc/intel: Factor out common smbus.hAngel Pons
2021-03-01soc/intel: Factor out common gpe.hAngel Pons
2021-02-22soc/intel/tigerlake: Add CrashLog implementation for intel TGLFrancois Toguo
2021-02-16soc/intel: Drop aliases on MMCONF_BASE_ADDRESSKyösti Mälkki
2021-01-25soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driverFurquan Shaikh
2021-01-11soc/intel/{icl,tgl,jsl,ehl}: add LPIT supportMichael Niewöhner
2021-01-08soc/intel/tigerlake: Enable USB2 port reset message on Type-C portsJohn Zhao
2020-12-08src/soc/intel/tigerlake: Add SPI DMI Destination IDSrinidhi N Kaushik
2020-11-30soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devicesTim Wawrzynczak
2020-11-13soc/intel/tigerlake: Add code for early tcssBrandon Breitenstein
2020-10-24{cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner
2020-10-21soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner
2020-10-05soc: move mainboard_get_dram_part_num prototype to memory_info.hNick Vaccaro
2020-10-05mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro
2020-10-03soc/intel: Make use of PMC low power program from common blockSubrata Banik
2020-09-25soc/intel/tigerlake: Remove extra '_' from GPIO PIN nameSubrata Banik
2020-09-21src/soc/intel: Drop unneeded empty linesElyes HAOUAS
2020-09-11soc/intel/tigerlake: Clean up systemagent.hSubrata Banik
2020-09-10soc/intel/tigerlake: Maintain consistent tab in iomap.hSubrata Banik
2020-09-04soc/intel/tigerlake: Remove unused PID_SDX macroSubrata Banik
2020-09-02soc/intel/tigerlake: Add mainboard hook for overriding SoC configJes Klinke
2020-08-26soc/intel/tigerlake: Rename pch_init() codeAlexey Buyanov
2020-08-12soc/intel/tigerlake: Add IRQs for LPSS uartPatrick Rudolph
2020-08-09soc/intel/{icl.tgl,jsl}: Remove SMRAM register programmingAamir Bohra
2020-08-06soc/intel/tigerlake: add common routine for DDR initNick Vaccaro
2020-07-29soc/intel/tigerlake: Set default USB3 de-emphasis to -3.5dBDuncan Laurie
2020-07-26soc/intel/tigerlake: Disable CPU PCIe in FSPShaunak Saha
2020-07-26src: Remove extra lines in license headerElyes HAOUAS
2020-07-25soc/intel/tigerlake: Update Pkg C-State latenciesRavi Sarawadi
2020-07-14src: Remove unused 'include <stdint.h>Elyes HAOUAS
2020-07-12soc/intel/tigerlake: Add Type-C IOM base address and size macroJohn Zhao
2020-07-07soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus masterJohn Zhao
2020-05-26soc/intel/tigerlake: Disable VMDWonkyu Kim
2020-05-22soc/intel/tigerlake: Add definition for PMC EPOCDuncan Laurie
2020-05-20soc/intel/tigerlake: Move PMC PCI resources under PMC deviceTim Wawrzynczak
2020-05-20tigerlake: update processor power limits configurationSumeet R Pawnikar
2020-05-18soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1EnJohn Zhao
2020-05-14soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh
2020-05-14soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh
2020-05-12soc/intel/tigerlake: Correct IRQ interruptWonkyu Kim
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-11soc/intel/tigerlake: Update C-State infoWonkyu Kim
2020-05-06soc/intel/tgl: Synchronize GPIO ASL table with Linux kernelShaunak Saha
2020-05-06soc/intel/tigerlake: Print HPR_CAUSE0 registerderek.huang
2020-05-04soc/intel/tigerlake: Update interrupt settingWonkyu Kim
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-04-17soc/intel/tigerlake: Remove eMMC/SD supportDuncan Laurie
2020-04-10soc/intel/tigerlake: Add support to initialize DDR4 MemoryVarun Joshi
2020-04-07soc/intel/tigerlake: Allow mainboard to override DRAM part numberMarco Chen
2020-04-06soc/intel/tigerlake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-04-02soc/intel/tigerlake: Add macros and SPD information for DDR4Furquan Shaikh
2020-04-02soc/intel/tigerlake: Reorganize memory initialization supportFurquan Shaikh
2020-04-01soc/intel/tigerlake: Remove Jasper Lake SoC referencesAamir Bohra
2020-03-21soc/intel/tigerlake: Make PCH_DEV_UART3 macro definition properSubrata Banik