coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-03-01	soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig	Subrata Banik
2020-02-17	vboot: remove VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT option	Joel Kitching
2020-02-15	soc/intel/tigerlake: Update Kconfig related to JSL	Usha P
2020-01-22	soc/intel/tigerlake: enable gpio dual route support	Nick Vaccaro
2020-01-18	soc/intel/tigerlake: Update chip files	Ravi Sarawadi
2020-01-09	soc/intel/tigerlake: Update Kconfig	Ravi Sarawadi
2019-12-20	soc/intel/tigerlake: Update FSP stack and heap size	Maulik V Vaghela
2019-12-16	soc/intel/tigerlake: Add FSP header and Fsp.fd file path for Jasper Lake	Aamir Bohra
2019-11-28	soc/intel/tigerlake: select correct chipset based on soc Kconfig	Maulik V Vaghela
2019-11-27	soc/intel/tigerlake: Fix smm_relocation_params	Kyösti Mälkki
2019-11-25	soc/intel/tigerlake: Add Jasperlake soc Kconfig	Maulik V Vaghela
2019-11-25	Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol	Arthur Heymans
2019-11-12	soc/intel/tigerlake: Remove FSP-T option in Kconfig	Arthur Heymans
2019-11-12	soc/intel/tigerlake: Remove deprecated CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_T...	Subrata Banik
2019-11-11	soc/intel/tigerlake: Fix cbmem_top	Arthur Heymans
2019-11-09	soc/intel/tigerlake: Do initial SoC commit till ramstage	Subrata Banik