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path: root/src/soc/intel/skylake
AgeCommit message (Expand)Author
2015-08-14skylake: use native gpio configuration for uartAaron Durbin
2015-08-14skylake: provide native gpio functionalityAaron Durbin
2015-08-13skylake: fix serial port with new code baseAaron Durbin
2015-08-13skylake: Add Deep Sx configuration for wake pinsDuncan Laurie
2015-08-13skylake: remove CBFS_SIZE option in SoC directoryAaron Durbin
2015-08-13skylake: fix garbled patch from upstreamAaron Durbin
2015-07-29skylake: Update microcode reload in ramstage.Rizwan Qureshi
2015-07-29Skylake: Fix microcode reload in bootblock cpu initRizwan Qureshi
2015-07-29skylake: clean-up pei_datarobbie zhang
2015-07-29skylake: align power management names with hardwareAaron Durbin
2015-07-29skylake: provide pcr helper to get a port's register spaceAaron Durbin
2015-07-29skylake: prefix the gpio functions with 'gpio_'Aaron Durbin
2015-07-29skylake: remove unused types and definitions in gpio.hAaron Durbin
2015-07-29skylake: remove the redundant fspNotify in chip final.robbie zhang
2015-07-29skylake: Rework microcode include pathDuncan Laurie
2015-07-24skylake: Fix building without serial consoleDuncan Laurie
2015-07-23skylake: sanitize pcr header for ACPI and assemblerAaron Durbin
2015-07-23skylake: provide more clarity for PCR accessAaron Durbin
2015-07-21skylake: add global reset cause registers to power stateAaron Durbin
2015-07-21skylake: take into account deep s3 in power failure checkAaron Durbin
2015-07-21skylake: read out and report full width of gen_pmcon registersAaron Durbin
2015-07-21Glados: Update Serial IO modes in devicetreeNaveen Krishna Chatradhi
2015-07-21intel/skylake: support 32bit uart8250_mem driver in romstageNaveen Krishna Chatradhi
2015-07-21Skylake: Initialize GPIOs for UART2rsatapat
2015-07-21Skylake: Only support UART2 as debug port, clean up the restNaveen Krishna Chatradhi
2015-07-21intel fsp: remove CHIPSET_RESERVED_MEM_BYTESAaron Durbin
2015-07-21skylake: re-enable PCIe L1 sub statesAaron Durbin
2015-07-21skylake: honor pcie root port settings already in chip.hAaron Durbin
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-17soc/intel: Remove microcode terminatorsStefan Reinauer
2015-07-17skylake: remove whitespace from ASL filesStefan Reinauer
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy
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