coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2017-09-11	soc/intel/skylake: Fix SPI WP disable status check	Ravi Sarawadi
2017-08-19	soc/intel/skylake: Enable power button SMI when jumping to payload	Furquan Shaikh
2017-08-10	soc/intel/skylake: Enable UART debug controller on S3 resume	Furquan Shaikh
2017-05-02	soc/intel/skylake: Clean up code by using common FAST_SPI module	Barnali Sarkar
2017-04-10	soc/intel/skylake: Use common PCR module	Subrata Banik
2016-12-23	soc/intel/skylake: Use the new SPI driver interface	Furquan Shaikh
2016-10-27	skylake: Add support for eSPI SMI events	Duncan Laurie
2016-07-15	soc/intel/skylake: use common Intel ACPI hardware definitions	Aaron Durbin
2016-01-07	Correct some common spelling mistakes	Martin Roth
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-08-14	skylake: fix SMI GPI status handling	Aaron Durbin
2015-08-14	skylake: enumerate the SMI status fields	Aaron Durbin
2015-07-16	soc/intel: Add Skylake SOC support	Lee Leahy
2015-07-16	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy