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Age
Commit message (
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Author
2019-05-07
intel/fsp1_1: Drop remnants of `pei_data`
Nico Huber
2019-05-07
intel/fsp1_1: Move MRC cache pointers into `romstage_params`
Nico Huber
2019-04-26
soc/{amd,intel}/chip: Use local include for chip.h
Elyes HAOUAS
2019-03-29
src: Use include <reset.h> when appropriate
Elyes HAOUAS
2019-03-18
src: Drop unused 'include <romstage_handoff.h>'
Elyes HAOUAS
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-07
src: Drop unused include <timestamp.h>
Elyes HAOUAS
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2018-12-28
arch/x86: Drop spurious arch/stages.h includes
Kyösti Mälkki
2018-11-23
soc/intel/skylake: Drop FSP_CAR options
Nico Huber
2018-11-16
src: Remove unneeded include <cbmem.h>
Elyes HAOUAS
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2017-10-05
soc/intel/skylake: Add support in SKL for PMC common code
Shaunak Saha
2017-07-18
vboot: Remove get_sw_write_protect_state callback
Julius Werner
2017-05-02
soc/intel/skylake: Clean up code by using common FAST_SPI module
Barnali Sarkar
2016-12-13
intel MMA: Enable MMA with FSP2.0
Pratik Prajapati
2016-09-15
soc/intel/skylake: Add FSP 2.0 support in romstage
Barnali Sarkar
2016-08-18
soc/intel/skylake: Correct Cache as ram size
Rizwan Qureshi
2016-08-17
soc/intel/skylake: restore MCHBAR and DMIBAR programming
Rizwan Qureshi
2016-07-28
soc/intel/skylake: Add C entry bootblock support
Subrata Banik
2016-07-28
bootmode: Get rid of CONFIG_BOOTMODE_STRAPS
Furquan Shaikh
2016-06-09
skylake: Support common LPSS I2C driver
Duncan Laurie
2016-02-29
skylake: Increase IGD stolen size to 64MB
Duncan Laurie
2016-01-29
intel/skylake: Implement native Cache-as-RAM (CAR)
Subrata Banik
2016-01-19
intel/skylake: Disable SaGv in recovery mode
haridhar
2016-01-18
intel/skylake: Add devicetree setting for DDR frequency limit UPD
Duncan Laurie
2016-01-15
intel/skylake: Update UPD parameters as per FSP 1.8.0
Barnali Sarkar
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-27
FSP 1.1: Replace soc_ prefix with fsp_
Lee Leahy
2015-10-27
intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params update
Rizwan Qureshi
2015-10-11
intel fsp1_1: prepare for romstage vboot verification split
Aaron Durbin
2015-10-11
soc/intel/common: remove chipset specific calls
Aaron Durbin
2015-10-11
intel SOC common: Remove unused parameters
Lee Leahy
2015-09-23
chromeos: vboot and chromeos dependency removal for sw write protect state
Paul Kocialkowski
2015-09-08
Skylake:Set DISB inside romstage after mrc init
Dhaval Sharma
2015-08-29
intel/skylake: Fix RMT disable of saved training data
Duncan Laurie
2015-08-29
intel/skylake: Force full memory train if RMT is enabled
Duncan Laurie
2015-08-29
fsp raminit: Add romstage_params to soc_memory_init_params
Duncan Laurie
2015-08-19
skylake: Update Memory and Silicon Init params
Rizwan Qureshi
2015-08-14
skylake: pass IED_REGION_SIZE Kconfig to FSP
Aaron Durbin
2015-08-13
skylake: fix serial port with new code base
Aaron Durbin
2015-07-24
skylake: Fix building without serial console
Duncan Laurie
2015-07-21
Skylake: Only support UART2 as debug port, clean up the rest
Naveen Krishna Chatradhi
2015-07-21
skylake: honor pcie root port settings already in chip.h
Aaron Durbin
2015-07-21
skylake: Show SPI controller if enabled in devicetree.cb
Duncan Laurie
2015-07-16
soc/intel: Add Skylake SOC support
Lee Leahy
2015-07-16
soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC
Lee Leahy