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path: root/src/soc/intel/skylake/romstage/romstage.c
AgeCommit message (Expand)Author
2015-09-23chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski
2015-09-08Skylake:Set DISB inside romstage after mrc initDhaval Sharma
2015-08-29intel/skylake: Fix RMT disable of saved training dataDuncan Laurie
2015-08-29intel/skylake: Force full memory train if RMT is enabledDuncan Laurie
2015-08-29fsp raminit: Add romstage_params to soc_memory_init_paramsDuncan Laurie
2015-08-19skylake: Update Memory and Silicon Init paramsRizwan Qureshi
2015-08-14skylake: pass IED_REGION_SIZE Kconfig to FSPAaron Durbin
2015-08-13skylake: fix serial port with new code baseAaron Durbin
2015-07-24skylake: Fix building without serial consoleDuncan Laurie
2015-07-21Skylake: Only support UART2 as debug port, clean up the restNaveen Krishna Chatradhi
2015-07-21skylake: honor pcie root port settings already in chip.hAaron Durbin
2015-07-21skylake: Show SPI controller if enabled in devicetree.cbDuncan Laurie
2015-07-16soc/intel: Add Skylake SOC supportLee Leahy
2015-07-16soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy
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