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path: root/src/soc/intel/skylake/nhlt
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2020-04-06soc/intel/skylake: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: I7354edb15ca9cbe181739bc2a148f16bb85ab118 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40218 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2020-03-18soc: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I4c110f60b764c97fab2a29f6f04680196f156da5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39610 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2018-11-16src: Remove unneeded include <console/console.h>Elyes HAOUAS
Change-Id: I40f8b4c7cbc55e16929b1f40d18bb5a9c19845da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-10-08src: Use tabs for indentationElyes HAOUAS
Change-Id: I6b40aaf5af5d114bbb0cd227dfd50b0ee19eebba Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28934 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25intel/skylake: nhlt: Add capture config for echo ref stream for Max98373 CodecSathyanarayana Nujella
During Speaker playback, quad Channel I/V feedback data is captured from SSP0 Rx. Out of these 4-channels, Stereo V-Sense data needs to be given as echo ref stream. So, adding stereo capture config to max98373_capture_formats. BUG=b:110074225 TEST='Audio playback and Capture Stereo echo ref data' Change-Id: I6fe619ece94d5011caffe37ef10b48f956938db9 Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/27182 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-28intel/skylake: nhlt: Update Max98373's capture formatSathyanarayana Nujella
Max98373's NHLT capture configuration is used for IV feedback for DSM algorithm. Feedback is 4-channel data. Without this configuration below error is seen in dmesg: [ 315.784250] snd_soc_skl 0000:00:1f.3: Blob NULL for id 0 type 3 dirn 1 [ 315.784263] snd_soc_skl 0000:00:1f.3: PCM: ch 4, freq 48000, fmt 32 So, update nhlt configuration accordingly. BUG=b:79362472 TEST=Audio playback works with IV feedback enabled Change-Id: I75434a63fe030ed9bb963c6d300d833a8e7d2d66 Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> Reviewed-on: https://review.coreboot.org/26384 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-03-27soc/intel/skylake: Add NHLT config for max98373 codecDuncan Laurie
Add the NHLT configuration for the max98373 codec to skylake, taken directly from cannonlake. This will allow skylake/kabylake boards to use this codec. Change-Id: Ifb6bf2d31fda25b18d9b1ce2bb721255335d55e4 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/25367 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: HARSHAPRIYA N <harshapriya.n@intel.com> Reviewed-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
2017-11-07soc/intel/kabylake: Add Dialog da7219 NHLT blob supportNaveen Manohar
Add APIs and required parameters for creating Dialog da7219 SSP endpoints in NHLT table. The use of a NHLT table is required to make audio work on the kabylake SoCs employing the internal DSP. The table describes the audio endpoints (render vs capture) along with their supported formats. BUG=b:68686020 TEST=check that NHLT table for da7219 is created properly Change-Id: I57b88873f1c59c8aadf8eec3c80a9d95165a2cc3 Signed-off-by: Naveen Manohar <naveen.m@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/22324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-09-05intel/skylake: nhlt: Add capture configuration format for IV feedback from ↵Harsha Priya
max98927 This changelist adds the capture format to be set for max98927. The nhlt blob is the same but the format params for capture are different from the render. BUG=b:36724448 TEST=IV feedback data is of good quality Change-Id: I135cf4479e89cd2046ff46027f94c0f71aed650e Signed-off-by: Harsha Priya <harshapriya.n@intel.com> Reviewed-on: https://review.coreboot.org/21340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-05-04intel/skylake: nhlt: Add 48Khz 2ch 16bit config for max98927Duncan Laurie
This changelist adds the 48Khz 2ch 16bit NHLT configuration for the Maxim 98927 speaker amplifier codec. BUG=b:35585307 TEST=manual testing to ensure speaker output is functional on Eve board Change-Id: Ieda988b557ecefdace5f81b474a952af56e69315 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/19548 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-03-15intel/skylake: nhlt: Add support for rt5514 NHLT blobDuncan Laurie
Add support for describing the NHLT blob for the rt5514 DSP. Currently this only supports 4 channel capture. BUG=b:35585307 BRANCH=none TEST=build and boot on Eve P1 Change-Id: Ib59b56222f9aa65370fdcf9ddf25145c571b1b2e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/18816 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-02-17soc/intel/skylake: Add Maxim 98927 and Realtek 5663 NHLT blob supportRizwan Qureshi
Add APIs and required parameters for creating Maxim 98927 and Realtek 5336 SSP endpoints in NHLT table. BUG=chrome-os-partner:62051 BRANCH=None TEST=check that NHLT table created is created properly Change-Id: Ica302aab05c5364faf4923dc5327be8e8eaae8b4 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Signed-off-by: M Naveen <naveen.m@intel.com> Reviewed-on: https://review.coreboot.org/18213 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-29soc/intel/{common,skylake}: provide common NHLT SoC supportAaron Durbin
The nhlt_soc_serialize() and nhlt_soc_serialize_oem_overrides() functions should be able to be leveraged on all Intel SoCs which support NHLT. Therefore provide that functionality and make skylake use it. Change-Id: Ib5535cc874f2680ec22554cecaf97b09753cacd0 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15490 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2016-06-29soc/intel/skylake: refactor nhlt supportAaron Durbin
Utilize the new NHLT helper functions by driving the NHLT endpoints through data descriptors. Change-Id: I80838214d3615b83d4939ec2d96a4fd7050d5920 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15488 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-29soc/intel/skylake: fix nhlt/ssm4567.c indentionAaron Durbin
Whitespace fix for improper space usage for indention. Change-Id: Ia6470bf152c57786d2d7f3d35bbf0609a2ee3ba2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15487 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2016-06-06intel/skylake: Fix typo in commentPaul Menzel
Correct the spelling of *firmware* in a comment. Change-Id: I44bcd95f754ff839d582dc2150e1883a6315da9e Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/15078 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-09nhlt: add api to override oem_id and oem_table_id of acpi_header_tFang, Yang A
This patch added nhlt_soc_serialize_oem_overrides and nhlt_serilalize_oem_overrides to be able to override oem_id and oem_table_id.board file can pass specific string by calling nhlt_soc_serialize_oem_overrides kernel use these two fields to construct a topology binary name if the designate file is not found a default dfw_sst.bin will be used it is optional. BUG=chrome-os-partner:49570 BRANCH=glados TEST=Build & Booted kunimitsu board. Verified that kernel can read new strings. Change-Id: I00b64fb8bb63de601d3116e0b8941057c1efa230 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 374ce08b2d8a2f4e5dd7f51eacb505dbb77fd171 Original-Change-Id: I03623c8ac81efb5a5ea3ec9c6cd604d2e9294022 Original-Signed-off-by: Fang, Yang A <yang.a.fang@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/322860 Original-Commit-Ready: Yang Fang <yang.a.fang@intel.com> Original-Tested-by: Yang Fang <yang.a.fang@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/13602 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-19intel/skylake: Add support for IV feedback loop capture blobSathya Prakash M R
SSM4567 smart speaker needs Current and Voltage sensing to be captured and reported to the algorithm. This needs 4 CH capture blob. BUG=chrome-os-partner:48625 BRANCH=none TEST=Built and booted. Verified CBFS locates the blob. CQ-DEPEND=CL:*242635 Change-Id: Ie13622da9a9a8ce5930d32e52ddaf2e0d4862895 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 06f1a501dcb3fa6102eccdb3e24f9011b7869ab0 Original-Change-Id: I7b65b7582b619be53544ebbe4b3ea65398d32a34 Original-Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/319020 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12995 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-16intel/skylake: Fix uninitialized variable warningMartin Roth
I don't think the warning is valid, because we already verify that num_channels is 2 or 4 as soon as we enter the function. Adding the default case makes the compiler happy. Fixes warning: src/soc/intel/skylake/nhlt/dmic.c: In function 'nhlt_soc_add_dmic_array': src/soc/intel/skylake/nhlt/dmic.c:100:2: error: 'formats' may be used uninitialized in this function [-Werror=maybe-uninitialized] return nhlt_endpoint_add_formats(endp, formats, num_formats); ^ Change-Id: Idc22c8478ff666af8915d780d7553909c3163690 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/13021 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-15intel/skylake: add nhlt supportAaron Durbin
The use of a NHLT table is required to make audio work on the skylake SoCs employing the internal DSP. The table describes the audo endpoints (render vs capture) along with their supported formats. These formats are not only dependent on the audio peripheral but also hardware interfaces. As such each format has an associated blob of DSP settings to make the peripheral work. Lastly, each of these settings are provided by Intel and need to be generated for each device's hardware connection plus mode/format it supports. This patch does not include the dsp setting blobs. The current supported connections: - digital mic array 2 channel - digital mic array 4 channel - Maxim 98357 amplifier - ADI ssm4567 - NAU88L25 headset codec BUG=chrome-os-partner:44481 BRANCH=None TEST=Built glados. Speakers, headphones, and mic on camera decently worked. CQ-DEPEND=CL:*239598 Change-Id: If1a9be97573b9b160893944661790cac7df26fca Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1f5514e27811c500732de97e1cc7edeced2607e7 Original-Change-Id: Ib42e895f00e7605cb30ce24d9b8dd00bf68a7477 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/313998 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/12938 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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