| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-10-11 | Skylake: remove the out-dated VR config and un-needed 24mhz calibration | robbie zhang |
| 2015-08-27 | skylake: only generate ACPI cpu entries once | Aaron Durbin |
| 2015-07-29 | skylake: Update microcode reload in ramstage. | Rizwan Qureshi |
| 2015-07-16 | soc/intel: Add Skylake SOC support | Lee Leahy |
| 2015-07-16 | soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC | Lee Leahy |
 |
index : coreboot.git | |
| my copy of coreboot | gitea |
| aboutsummaryrefslogtreecommitdiff |