Age | Commit message (Expand) | Author |
2017-03-17 | soc/intel/skylake: Wrap lines at 80 columns | Lee Leahy |
2017-03-17 | soc/intel/skylake: Add int to unsigned | Lee Leahy |
2017-02-22 | soc/intel/skylake: Fix broken suspend-resume | Furquan Shaikh |
2017-02-14 | soc/intel/skylake: Perform CPU MP Init before FSP-S Init | Subrata Banik |
2016-11-28 | soc/intel/skylake: Add USB Port Over Current (OC) Pin programming | Subrata Banik |
2016-11-11 | soc/intel/skylake: move i2c voltage config to own variable | Aaron Durbin |
2016-09-19 | soc/intel/skylake: Add FSP 2.0 support in ramstage | Naresh G Solanki |
2016-08-31 | src/soc: Add required space before opening parenthesis '(' | Elyes HAOUAS |
2016-06-09 | skylake: Move I2C bus configuration to separate structure | Duncan Laurie |
2016-05-21 | skylake: Add ACPI device name handler | Duncan Laurie |
2016-03-12 | soc/intel/skylake: add option to enable VR specific mailbox cmd | Rizwan Qureshi |
2016-01-19 | intel/skylake: Adding provision to set voltages to the I2C ports | Naresh G Solanki |
2016-01-18 | intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit | Barnali Sarkar |
2016-01-18 | intel/skylake: provide default VR configuration | Aaron Durbin |
2016-01-17 | intel/skylake: disable heci1 if psf is unlocked | Archana Patni |
2016-01-16 | intel/skylake: Add VrConfig UPD parameters from coreboot | Rizwan Qureshi |
2016-01-16 | intel/skylake: Enable SkipMpInit token | Rizwan Qureshi |
2016-01-15 | intel/skylake: More UPD params are added for PCH policy in FSP | Rizwan Qureshi |
2016-01-15 | intel/skylake: Update UPD parameters as per FSP 1.8.0 | Barnali Sarkar |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-10-27 | intel/skylake: Clean up USB configuration in devicetree | Duncan Laurie |
2015-10-27 | FSP 1.1: Replace soc_ prefix with fsp_ | Lee Leahy |
2015-10-27 | intel/skylake: IRQ programming through UPD | Subrata Banik |
2015-10-27 | intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params update | Rizwan Qureshi |
2015-09-17 | intel/skylake: Create "RtcLock" Silicon UPD from coreboot | Barnali Sarkar |
2015-09-10 | fsp1_1: provide binding to UEFI version | Aaron Durbin |
2015-09-08 | skylake: Apply USB2 and USB3 port enable/disable settings | Duncan Laurie |
2015-08-27 | skylake: only generate ACPI cpu entries once | Aaron Durbin |
2015-08-19 | skylake: Update Memory and Silicon Init params | Rizwan Qureshi |
2015-07-29 | skylake: remove the redundant fspNotify in chip final. | robbie zhang |
2015-07-16 | soc/intel: Add Skylake SOC support | Lee Leahy |
2015-07-16 | soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC | Lee Leahy |